[src/trunk]: src/sys/arch Keep current hardware priority value in struct cpu_...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/8d831c7bfc20
branches:  trunk
changeset: 959672:8d831c7bfc20
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sun Feb 21 15:00:04 2021 +0000

description:
Keep current hardware priority value in struct cpu_info and use it instead
of reading icc_pmr_el1 in gicv3_set_priority.

diffstat:

 sys/arch/aarch64/include/cpu.h |   5 +++--
 sys/arch/arm/cortex/gicv3.c    |  17 ++++++++++-------
 sys/arch/arm/include/cpu.h     |   3 ++-
 3 files changed, 15 insertions(+), 10 deletions(-)

diffs (98 lines):

diff -r f0fb57f7d904 -r 8d831c7bfc20 sys/arch/aarch64/include/cpu.h
--- a/sys/arch/aarch64/include/cpu.h    Sun Feb 21 14:57:25 2021 +0000
+++ b/sys/arch/aarch64/include/cpu.h    Sun Feb 21 15:00:04 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.31 2021/02/20 14:51:07 jmcneill Exp $ */
+/* $NetBSD: cpu.h,v 1.32 2021/02/21 15:00:04 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -100,7 +100,8 @@
        int ci_mtx_oldspl;
        int ci_mtx_count;
 
-       int ci_cpl;
+       int ci_cpl;             /* current processor level (spl) */
+       int ci_hwpl;            /* current hardware priority */
        volatile u_int ci_softints;
        volatile u_int ci_intr_depth;
        volatile uint32_t ci_blocked_pics;
diff -r f0fb57f7d904 -r 8d831c7bfc20 sys/arch/arm/cortex/gicv3.c
--- a/sys/arch/arm/cortex/gicv3.c       Sun Feb 21 14:57:25 2021 +0000
+++ b/sys/arch/arm/cortex/gicv3.c       Sun Feb 21 15:00:04 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.41 2021/02/09 17:44:01 ryo Exp $ */
+/* $NetBSD: gicv3.c,v 1.42 2021/02/21 15:00:05 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -31,7 +31,7 @@
 #define        _INTR_PRIVATE
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.41 2021/02/09 17:44:01 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.42 2021/02/21 15:00:05 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/kernel.h>
@@ -222,11 +222,12 @@
 gicv3_set_priority(struct pic_softc *pic, int ipl)
 {
        struct gicv3_softc * const sc = PICTOSOFTC(pic);
-       const uint8_t curpmr = icc_pmr_read();
+       struct cpu_info * const ci = curcpu();
        const uint8_t newpmr = IPL_TO_PMR(sc, ipl);
 
-       if (newpmr > curpmr) {
+       if (newpmr > ci->ci_hwpl) {
                /* Lowering priority mask */
+               ci->ci_hwpl = newpmr;
                icc_pmr_write(newpmr);
        }
 }
@@ -414,7 +415,8 @@
                ;
 
        /* Set initial priority mask */
-       icc_pmr_write(IPL_TO_PMR(sc, IPL_HIGH));
+       ci->ci_hwpl = IPL_TO_PMR(sc, IPL_HIGH);
+       icc_pmr_write(ci->ci_hwpl);
 
        /* Set the binary point field to the minimum value */
        icc_bpr1_write(0);
@@ -733,7 +735,8 @@
 
        ci->ci_data.cpu_nintr++;
 
-       if (icc_pmr_read() != pmr) {
+       if (ci->ci_hwpl != pmr) {
+               ci->ci_hwpl = pmr;
                icc_pmr_write(pmr);
        }
 
@@ -758,7 +761,7 @@
                        pic_do_pending_ints(I32_bit, ipl, frame);
                } else if (ci->ci_cpl != ipl) {
                        icc_pmr_write(IPL_TO_PMR(sc, ipl));
-                       ci->ci_cpl = ipl;
+                       ci->ci_hwpl = ci->ci_cpl = ipl;
                }
 
                if (early_eoi) {
diff -r f0fb57f7d904 -r 8d831c7bfc20 sys/arch/arm/include/cpu.h
--- a/sys/arch/arm/include/cpu.h        Sun Feb 21 14:57:25 2021 +0000
+++ b/sys/arch/arm/include/cpu.h        Sun Feb 21 15:00:04 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.h,v 1.115 2021/02/20 14:51:06 jmcneill Exp $       */
+/*     $NetBSD: cpu.h,v 1.116 2021/02/21 15:00:04 jmcneill Exp $       */
 
 /*
  * Copyright (c) 1994-1996 Mark Brinicombe.
@@ -185,6 +185,7 @@
                        ci_softc;       /* platform softc */
 
        int             ci_cpl;         /* current processor level (spl) */
+       int             ci_hwpl;        /* current hardware priority */
        int             ci_kfpu_spl;
 
        volatile u_int  ci_intr_depth;  /* */