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[src/trunk]: src/sys/arch/arm/cortex Only target the boot cpu for real with S...



details:   https://anonhg.NetBSD.org/src/rev/8b7cc80c92b9
branches:  trunk
changeset: 960743:8b7cc80c92b9
user:      skrll <skrll%NetBSD.org@localhost>
date:      Sun Mar 28 09:11:38 2021 +0000

description:
Only target the boot cpu for real with SPI interrupts.  I tried to do
this back in 2014, but somehow I missed a spot.

This is a quick-and-dirty fix for the USB stack which expects transfer
completions to be in-order.  If interrupts happen across the CPUs then
this isn't guaranteed (yet).

kern/55243 panic at usb_transfer_complete() on raspberry pi 4

diffstat:

 sys/arch/arm/cortex/gic.c |  8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diffs (30 lines):

diff -r ff018d041dfa -r 8b7cc80c92b9 sys/arch/arm/cortex/gic.c
--- a/sys/arch/arm/cortex/gic.c Sun Mar 28 09:08:13 2021 +0000
+++ b/sys/arch/arm/cortex/gic.c Sun Mar 28 09:11:38 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: gic.c,v 1.46 2021/02/23 10:03:04 jmcneill Exp $        */
+/*     $NetBSD: gic.c,v 1.47 2021/03/28 09:11:38 skrll Exp $   */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -34,7 +34,7 @@
 #define _INTR_PRIVATE
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.46 2021/02/23 10:03:04 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.47 2021/03/28 09:11:38 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -517,7 +517,11 @@
                if (is != NULL && is->is_mpsafe) {
                        const u_int byte_shift = 8 * (irq & 3);
                        uint32_t targets = gicd_read(sc, targets_reg);
+#if 0
                        targets |= sc->sc_mptargets << byte_shift;
+#else
+                       targets |= sc->sc_bptargets << byte_shift;
+#endif
                        gicd_write(sc, targets_reg, targets);
                }
        }



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