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[src/trunk]: src/sys/arch/arm/amlogic Fix C&P error in G12_CLK_vid_pll



details:   https://anonhg.NetBSD.org/src/rev/a7f74950c07e
branches:  trunk
changeset: 951515:a7f74950c07e
user:      joerg <joerg%NetBSD.org@localhost>
date:      Thu Feb 04 22:55:36 2021 +0000

description:
Fix C&P error in G12_CLK_vid_pll

diffstat:

 sys/arch/arm/amlogic/mesong12_clkc.c |  6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diffs (27 lines):

diff -r e65bcdb17479 -r a7f74950c07e sys/arch/arm/amlogic/mesong12_clkc.c
--- a/sys/arch/arm/amlogic/mesong12_clkc.c      Thu Feb 04 22:36:52 2021 +0000
+++ b/sys/arch/arm/amlogic/mesong12_clkc.c      Thu Feb 04 22:55:36 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mesong12_clkc.c,v 1.5 2021/01/27 03:10:18 thorpej Exp $ */
+/* $NetBSD: mesong12_clkc.c,v 1.6 2021/02/04 22:55:36 joerg Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mesong12_clkc.c,v 1.5 2021/01/27 03:10:18 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mesong12_clkc.c,v 1.6 2021/02/04 22:55:36 joerg Exp $");
 
 #include <sys/param.h>
 #include <sys/types.h>
@@ -939,7 +939,7 @@
            __BIT(18),                  /* sel */                       \
            0)
 #define G12_CLK_vid_pll                                                        \
-       MESON_CLK_GATE(MESONG12_CLOCK_VID_PLL_DIV, "vid_pll",           \
+       MESON_CLK_GATE(MESONG12_CLOCK_VID_PLL, "vid_pll",               \
            "vid_pll_sel",              /* parent */                    \
            HHI_VID_PLL_CLK_DIV,        /* reg */                       \
            19)                         /* bit */



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