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[src/trunk]: src/sys/dev/pci/ixgbe Add some debug printf()s and modify comments.
details: https://anonhg.NetBSD.org/src/rev/71344e7b914e
branches: trunk
changeset: 948288:71344e7b914e
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Thu Dec 24 10:00:36 2020 +0000
description:
Add some debug printf()s and modify comments.
diffstat:
sys/dev/pci/ixgbe/ixgbe.c | 17 +++++++++++------
1 files changed, 11 insertions(+), 6 deletions(-)
diffs (61 lines):
diff -r c2d27be4742b -r 71344e7b914e sys/dev/pci/ixgbe/ixgbe.c
--- a/sys/dev/pci/ixgbe/ixgbe.c Thu Dec 24 06:14:41 2020 +0000
+++ b/sys/dev/pci/ixgbe/ixgbe.c Thu Dec 24 10:00:36 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.c,v 1.264 2020/12/24 06:14:41 msaitoh Exp $ */
+/* $NetBSD: ixgbe.c,v 1.265 2020/12/24 10:00:36 msaitoh Exp $ */
/******************************************************************************
@@ -3105,7 +3105,7 @@
eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
/* Be sure the queue bits are not cleared */
eicr &= ~IXGBE_EICR_RTX_QUEUE;
- /* Clear interrupt with write */
+ /* Clear all OTHER interrupts with write */
IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
if (ixgbe_is_sfp(hw)) {
@@ -5172,7 +5172,7 @@
u32 eicr, eicr_mask;
u32 task_requests = 0;
- /* Silicon errata #26 on 82598 */
+ /* Silicon errata #26 on 82598. Disable all interrupts */
IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
@@ -5186,7 +5186,8 @@
if ((ifp->if_flags & IFF_RUNNING) != 0) {
/*
- * The same as ixgbe_msix_que() about "que->txrx_use_workqueue".
+ * The same as ixgbe_msix_que() about
+ * "que->txrx_use_workqueue".
*/
que->txrx_use_workqueue = adapter->txrx_use_workqueue;
@@ -6142,6 +6143,8 @@
device_printf(dev, "EIMS_EX(1):\t%08x\n",
IXGBE_READ_REG(hw, IXGBE_EIMS_EX(1)));
}
+ device_printf(dev, "EIAM:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAM));
+ device_printf(dev, "EIAC:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIAC));
} /* ixgbe_print_debug_info */
/************************************************************************
@@ -6566,10 +6569,12 @@
que->req.ev_count++;
ixgbe_sched_handle_que(adapter, que);
} else if (que->res != NULL) {
- /* Re-enable this interrupt */
+ /* MSIX: Re-enable this interrupt */
ixgbe_enable_queue(adapter, que->msix);
- } else
+ } else {
+ /* INTx or MSI */
ixgbe_enable_intr(adapter);
+ }
return;
} /* ixgbe_handle_que */
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