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[src/trunk]: src/sys/arch/arm/arm32 Count bus_dmamap_sync events for coherent...
details: https://anonhg.NetBSD.org/src/rev/f51df4b45742
branches: trunk
changeset: 948247:f51df4b45742
user: skrll <skrll%NetBSD.org@localhost>
date: Tue Dec 22 13:07:32 2020 +0000
description:
Count bus_dmamap_sync events for coherent ranges and non-coherent ranges
diffstat:
sys/arch/arm/arm32/bus_dma.c | 40 ++++++++++++++++++++++++++++++++--------
1 files changed, 32 insertions(+), 8 deletions(-)
diffs (94 lines):
diff -r f03a191767d1 -r f51df4b45742 sys/arch/arm/arm32/bus_dma.c
--- a/sys/arch/arm/arm32/bus_dma.c Tue Dec 22 10:46:51 2020 +0000
+++ b/sys/arch/arm/arm32/bus_dma.c Tue Dec 22 13:07:32 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_dma.c,v 1.128 2020/12/20 10:34:33 jmcneill Exp $ */
+/* $NetBSD: bus_dma.c,v 1.129 2020/12/22 13:07:32 skrll Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998, 2020 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
#include "opt_cputypes.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.128 2020/12/20 10:34:33 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.129 2020/12/22 13:07:32 skrll Exp $");
#include <sys/param.h>
@@ -94,6 +94,19 @@
static struct evcnt bus_dma_sync_postwrite =
EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "sync postwrite");
+static struct evcnt bus_dma_sync_coherent_prereadwrite =
+ EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "sync coherent prereadwrite");
+static struct evcnt bus_dma_sync_coherent_preread =
+ EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "sync coherent preread");
+static struct evcnt bus_dma_sync_coherent_prewrite =
+ EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "sync coherent prewrite");
+static struct evcnt bus_dma_sync_coherent_postread =
+ EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "sync coherent postread");
+static struct evcnt bus_dma_sync_coherent_postreadwrite =
+ EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "sync coherent postreadwrite");
+static struct evcnt bus_dma_sync_coherent_postwrite =
+ EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "sync coherent postwrite");
+
EVCNT_ATTACH_STATIC(bus_dma_creates);
EVCNT_ATTACH_STATIC(bus_dma_bounced_creates);
EVCNT_ATTACH_STATIC(bus_dma_loads);
@@ -114,6 +127,13 @@
EVCNT_ATTACH_STATIC(bus_dma_sync_postreadwrite);
EVCNT_ATTACH_STATIC(bus_dma_sync_postwrite);
+EVCNT_ATTACH_STATIC(bus_dma_sync_coherent_prereadwrite);
+EVCNT_ATTACH_STATIC(bus_dma_sync_coherent_preread);
+EVCNT_ATTACH_STATIC(bus_dma_sync_coherent_prewrite);
+EVCNT_ATTACH_STATIC(bus_dma_sync_coherent_postread);
+EVCNT_ATTACH_STATIC(bus_dma_sync_coherent_postreadwrite);
+EVCNT_ATTACH_STATIC(bus_dma_sync_coherent_postwrite);
+
#define STAT_INCR(x) (bus_dma_ ## x.ev_count++)
#else
#define STAT_INCR(x) __nothing
@@ -1108,7 +1128,11 @@
if (post_ops == BUS_DMASYNC_POSTWRITE) {
KASSERT(pre_ops == 0);
- STAT_INCR(sync_postwrite);
+ if ((map->_dm_flags & _BUS_DMAMAP_COHERENT)) {
+ STAT_INCR(sync_coherent_postwrite);
+ } else {
+ STAT_INCR(sync_postwrite);
+ }
return;
}
@@ -1157,23 +1181,23 @@
if ((map->_dm_flags & _BUS_DMAMAP_COHERENT)) {
switch (ops) {
case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
- STAT_INCR(sync_prereadwrite);
+ STAT_INCR(sync_coherent_prereadwrite);
break;
case BUS_DMASYNC_PREREAD:
- STAT_INCR(sync_preread);
+ STAT_INCR(sync_coherent_preread);
break;
case BUS_DMASYNC_PREWRITE:
- STAT_INCR(sync_prewrite);
+ STAT_INCR(sync_coherent_prewrite);
break;
case BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE:
- STAT_INCR(sync_postreadwrite);
+ STAT_INCR(sync_coherent_postreadwrite);
break;
case BUS_DMASYNC_POSTREAD:
- STAT_INCR(sync_postread);
+ STAT_INCR(sync_coherent_postread);
break;
/* BUS_DMASYNC_POSTWRITE was aleady handled as a fastpath */
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