Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/lib/libc Remove '_OFFSETOF' prefix for genassm(1) generate C...
details: https://anonhg.NetBSD.org/src/rev/3dc05450424a
branches: trunk
changeset: 940706:3dc05450424a
user: skrll <skrll%NetBSD.org@localhost>
date: Thu Oct 15 05:27:53 2020 +0000
description:
Remove '_OFFSETOF' prefix for genassm(1) generate CPP identifers for
consistency with other arches.
NFCI and libc.so is the same before and after.
diffstat:
lib/libc/arch/mips/gen/_resumecontext.S | 10 +-
lib/libc/arch/mips/gen/_setjmp.S | 110 +++++++++++-----------
lib/libc/arch/mips/gen/setjmp.S | 72 +++++++-------
lib/libc/arch/mips/gen/swapcontext.S | 12 +-
lib/libc/arch/mips/genassym.cf | 90 +++++++++---------
lib/libc/arch/mips/sys/getcontext.S | 10 +-
lib/libc/compat/arch/mips/gen/compat_setjmp.S | 74 +++++++-------
lib/libc/compat/arch/mips/gen/compat_sigsetjmp.S | 8 +-
lib/libc/compat/arch/mips/sys/compat_sigpending.S | 6 +-
9 files changed, 196 insertions(+), 196 deletions(-)
diffs (truncated from 704 to 300 lines):
diff -r f2aa37a59fd6 -r 3dc05450424a lib/libc/arch/mips/gen/_resumecontext.S
--- a/lib/libc/arch/mips/gen/_resumecontext.S Thu Oct 15 05:10:30 2020 +0000
+++ b/lib/libc/arch/mips/gen/_resumecontext.S Thu Oct 15 05:27:53 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: _resumecontext.S,v 1.12 2020/10/15 05:10:30 skrll Exp $ */
+/* $NetBSD: _resumecontext.S,v 1.13 2020/10/15 05:27:53 skrll Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
#include "assym.h"
#if defined(SYSLIBC_SCCS) && !defined(lint)
- RCSID("$NetBSD: _resumecontext.S,v 1.12 2020/10/15 05:10:30 skrll Exp $")
+ RCSID("$NetBSD: _resumecontext.S,v 1.13 2020/10/15 05:27:53 skrll Exp $")
#endif /* SYSLIBC_SCCS && !lint */
.set reorder
@@ -59,17 +59,17 @@
PTR_SUBU sp, sp, UCONTEXT_SIZE # get space for ucontext
move a0, sp # arg0 for getcontext
- PTR_S zero, _OFFSETOF_UC_LINK(a0) # make sure uc_link is 0
+ PTR_S zero, _UC_LINK(a0) # make sure uc_link is 0
SYSTRAP(getcontext) # get context
#if defined(__mips_n32) || defined(__mips_n64)
REG_PROLOGUE
/* We saved gp in t2 above */
- REG_S t3, _OFFSETOF_UC_GREGS_GP(a0)
+ REG_S t3, _UC_GREGS_GP(a0)
REG_EPILOGUE
#endif
- PTR_L a0, _OFFSETOF_UC_LINK(a0) # linked context?
+ PTR_L a0, _UC_LINK(a0) # linked context?
NOP_L
beq a0, zero, 1f # nope, exit process
nop
diff -r f2aa37a59fd6 -r 3dc05450424a lib/libc/arch/mips/gen/_setjmp.S
--- a/lib/libc/arch/mips/gen/_setjmp.S Thu Oct 15 05:10:30 2020 +0000
+++ b/lib/libc/arch/mips/gen/_setjmp.S Thu Oct 15 05:27:53 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: _setjmp.S,v 1.25 2020/10/15 05:10:30 skrll Exp $ */
+/* $NetBSD: _setjmp.S,v 1.26 2020/10/15 05:27:53 skrll Exp $ */
/*-
* Copyright (c) 1991, 1993
@@ -46,7 +46,7 @@
#if 0
RCSID("from: @(#)_setjmp.s 8.1 (Berkeley) 6/4/93")
#else
- RCSID("$NetBSD: _setjmp.S,v 1.25 2020/10/15 05:10:30 skrll Exp $")
+ RCSID("$NetBSD: _setjmp.S,v 1.26 2020/10/15 05:27:53 skrll Exp $")
#endif
#endif /* LIBC_SCCS and not lint */
@@ -66,20 +66,20 @@
LEAF(_setjmp)
REG_PROLOGUE
REG_LI v0, 0xACEDBADE # sigcontext magic number
- REG_S ra, _OFFSETOF_SC_PC(a0) # sc_pc = return address
- REG_S v0, _OFFSETOF_SC_REGS(a0) # saved in sc_regs[0]
- REG_S s0, _OFFSETOF_SC_REGS_S0(a0)
- REG_S s1, _OFFSETOF_SC_REGS_S1(a0)
- REG_S s2, _OFFSETOF_SC_REGS_S2(a0)
- REG_S s3, _OFFSETOF_SC_REGS_S3(a0)
- REG_S s4, _OFFSETOF_SC_REGS_S4(a0)
- REG_S s5, _OFFSETOF_SC_REGS_S5(a0)
- REG_S s6, _OFFSETOF_SC_REGS_S6(a0)
- REG_S s7, _OFFSETOF_SC_REGS_S7(a0)
- REG_S sp, _OFFSETOF_SC_REGS_SP(a0)
- REG_S s8, _OFFSETOF_SC_REGS_S8(a0)
+ REG_S ra, _SC_PC(a0) # sc_pc = return address
+ REG_S v0, _SC_REGS(a0) # saved in sc_regs[0]
+ REG_S s0, _SC_REGS_S0(a0)
+ REG_S s1, _SC_REGS_S1(a0)
+ REG_S s2, _SC_REGS_S2(a0)
+ REG_S s3, _SC_REGS_S3(a0)
+ REG_S s4, _SC_REGS_S4(a0)
+ REG_S s5, _SC_REGS_S5(a0)
+ REG_S s6, _SC_REGS_S6(a0)
+ REG_S s7, _SC_REGS_S7(a0)
+ REG_S sp, _SC_REGS_SP(a0)
+ REG_S s8, _SC_REGS_S8(a0)
#if defined(__mips_n32) || defined(__mips_n64)
- REG_S gp, _OFFSETOF_SC_REGS_GP(a0) # newabi gp is callee-saved
+ REG_S gp, _SC_REGS_GP(a0) # newabi gp is callee-saved
#endif
/*
* In N32, FP registers F20, F22, F24, F26, F28, F30 are callee-saved.
@@ -89,26 +89,26 @@
#ifndef SOFTFLOAT_FOR_GCC
cfc1 v0, $31 # too bad cant check if FP used
#if defined(__mips_n64) || defined(__mips_n32)
- FP_S $f30, _OFFSETOF_SC_FPREGS_F30(a0)
- FP_S $f28, _OFFSETOF_SC_FPREGS_F28(a0)
- FP_S $f26, _OFFSETOF_SC_FPREGS_F26(a0)
- FP_S $f24, _OFFSETOF_SC_FPREGS_F24(a0)
+ FP_S $f30, _SC_FPREGS_F30(a0)
+ FP_S $f28, _SC_FPREGS_F28(a0)
+ FP_S $f26, _SC_FPREGS_F26(a0)
+ FP_S $f24, _SC_FPREGS_F24(a0)
#endif
#if defined(__mips_n32) || defined(__mips_o32) || defined(__mips_o64)
- FP_S $f22, _OFFSETOF_SC_FPREGS_F22(a0)
- FP_S $f20, _OFFSETOF_SC_FPREGS_F20(a0)
+ FP_S $f22, _SC_FPREGS_F22(a0)
+ FP_S $f20, _SC_FPREGS_F20(a0)
#endif
#if defined(__mips_o32) || defined(__mips_o64)
- FP_S $f21, _OFFSETOF_SC_FPREGS_F21(a0)
- FP_S $f23, _OFFSETOF_SC_FPREGS_F23(a0)
+ FP_S $f21, _SC_FPREGS_F21(a0)
+ FP_S $f23, _SC_FPREGS_F23(a0)
#endif
#if defined(__mips_n64)
- FP_S $f25, _OFFSETOF_SC_FPREGS_F25(a0)
- FP_S $f27, _OFFSETOF_SC_FPREGS_F27(a0)
- FP_S $f29, _OFFSETOF_SC_FPREGS_F29(a0)
- FP_S $f31, _OFFSETOF_SC_FPREGS_F31(a0)
+ FP_S $f25, _SC_FPREGS_F25(a0)
+ FP_S $f27, _SC_FPREGS_F27(a0)
+ FP_S $f29, _SC_FPREGS_F29(a0)
+ FP_S $f31, _SC_FPREGS_F31(a0)
#endif
- INT_S v0, _OFFSETOF_SC_FPREGS_FCSR(a0)
+ INT_S v0, _SC_FPREGS_FCSR(a0)
#endif /* SOFTFLOAT_FOR_GCC */
REG_EPILOGUE
@@ -122,29 +122,29 @@
SAVE_GP(CALLFRAME_GP)
REG_PROLOGUE
- REG_L v0, _OFFSETOF_SC_REGS(a0) # get magic number
- REG_L ra, _OFFSETOF_SC_PC(a0)
+ REG_L v0, _SC_REGS(a0) # get magic number
+ REG_L ra, _SC_PC(a0)
REG_LI t0, 0xACEDBADE
bne v0, t0, botch # jump if error
PTR_ADDU sp, sp, CALLFRAME_SIZ # does not matter, sanity
- REG_S a1, _OFFSETOF_SC_REGS_V0(a0) # save return value
- REG_L s0, _OFFSETOF_SC_REGS_S0(a0)
- REG_L s1, _OFFSETOF_SC_REGS_S1(a0)
- REG_L s2, _OFFSETOF_SC_REGS_S2(a0)
- REG_L s3, _OFFSETOF_SC_REGS_S3(a0)
- REG_L s4, _OFFSETOF_SC_REGS_S4(a0)
- REG_L s5, _OFFSETOF_SC_REGS_S5(a0)
- REG_L s6, _OFFSETOF_SC_REGS_S6(a0)
- REG_L s7, _OFFSETOF_SC_REGS_S7(a0)
+ REG_S a1, _SC_REGS_V0(a0) # save return value
+ REG_L s0, _SC_REGS_S0(a0)
+ REG_L s1, _SC_REGS_S1(a0)
+ REG_L s2, _SC_REGS_S2(a0)
+ REG_L s3, _SC_REGS_S3(a0)
+ REG_L s4, _SC_REGS_S4(a0)
+ REG_L s5, _SC_REGS_S5(a0)
+ REG_L s6, _SC_REGS_S6(a0)
+ REG_L s7, _SC_REGS_S7(a0)
#if defined(__mips_n32) || defined(__mips_n64)
- REG_L gp, _OFFSETOF_SC_REGS_GP(a0)
+ REG_L gp, _SC_REGS_GP(a0)
#endif
#ifndef SOFTFLOAT_FOR_GCC
# get fpu status
- INT_L v0, _OFFSETOF_SC_FPREGS_FCSR(a0)
+ INT_L v0, _SC_FPREGS_FCSR(a0)
#endif
- REG_L sp, _OFFSETOF_SC_REGS_SP(a0)
- REG_L s8, _OFFSETOF_SC_REGS_S8(a0)
+ REG_L sp, _SC_REGS_SP(a0)
+ REG_L s8, _SC_REGS_S8(a0)
#ifndef SOFTFLOAT_FOR_GCC
ctc1 v0, $31
/*
@@ -153,24 +153,24 @@
* In O32, FP registers F20 .. F23 are callee-saved.
*/
#if defined(__mips_n64) || defined(__mips_n32)
- FP_L $f30, _OFFSETOF_SC_FPREGS_F30(a0)
- FP_L $f28, _OFFSETOF_SC_FPREGS_F28(a0)
- FP_L $f26, _OFFSETOF_SC_FPREGS_F26(a0)
- FP_L $f24, _OFFSETOF_SC_FPREGS_F24(a0)
+ FP_L $f30, _SC_FPREGS_F30(a0)
+ FP_L $f28, _SC_FPREGS_F28(a0)
+ FP_L $f26, _SC_FPREGS_F26(a0)
+ FP_L $f24, _SC_FPREGS_F24(a0)
#endif
#if defined(__mips_n32) || defined(__mips_o32) || defined(__mips_o64)
- FP_L $f22, _OFFSETOF_SC_FPREGS_F22(a0)
- FP_L $f20, _OFFSETOF_SC_FPREGS_F20(a0)
+ FP_L $f22, _SC_FPREGS_F22(a0)
+ FP_L $f20, _SC_FPREGS_F20(a0)
#endif
#if defined(__mips_o32) || defined(__mips_o64)
- FP_L $f21, _OFFSETOF_SC_FPREGS_F21(a0)
- FP_L $f23, _OFFSETOF_SC_FPREGS_F23(a0)
+ FP_L $f21, _SC_FPREGS_F21(a0)
+ FP_L $f23, _SC_FPREGS_F23(a0)
#endif
#if defined(__mips_n64)
- FP_L $f25, _OFFSETOF_SC_FPREGS_F25(a0)
- FP_L $f27, _OFFSETOF_SC_FPREGS_F27(a0)
- FP_L $f29, _OFFSETOF_SC_FPREGS_F29(a0)
- FP_L $f31, _OFFSETOF_SC_FPREGS_F31(a0)
+ FP_L $f25, _SC_FPREGS_F25(a0)
+ FP_L $f27, _SC_FPREGS_F27(a0)
+ FP_L $f29, _SC_FPREGS_F29(a0)
+ FP_L $f31, _SC_FPREGS_F31(a0)
#endif
#endif /* SOFTFLOAT_FOR_GCC */
diff -r f2aa37a59fd6 -r 3dc05450424a lib/libc/arch/mips/gen/setjmp.S
--- a/lib/libc/arch/mips/gen/setjmp.S Thu Oct 15 05:10:30 2020 +0000
+++ b/lib/libc/arch/mips/gen/setjmp.S Thu Oct 15 05:27:53 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: setjmp.S,v 1.19 2010/09/03 17:22:51 matt Exp $ */
+/* $NetBSD: setjmp.S,v 1.20 2020/10/15 05:27:53 skrll Exp $ */
/*-
* Copyright (c) 1991, 1993
@@ -41,7 +41,7 @@
#if 0
RCSID("from: @(#)setjmp.s 8.1 (Berkeley) 6/4/93")
#else
- RCSID("$NetBSD: setjmp.S,v 1.19 2010/09/03 17:22:51 matt Exp $")
+ RCSID("$NetBSD: setjmp.S,v 1.20 2020/10/15 05:27:53 skrll Exp $")
#endif
#endif /* LIBC_SCCS and not lint */
@@ -70,7 +70,7 @@
move s0, a0 # save sigcontext
/* Get the signal mask. */
- PTR_ADDU a2, a0, _OFFSETOF_SC_MASK # &sc.sc_mask
+ PTR_ADDU a2, a0, _SC_MASK # &sc.sc_mask
move a1, zero
jal _C_LABEL(__sigprocmask14) # get current signal mask
@@ -80,14 +80,14 @@
jal _C_LABEL(__sigaltstack14)
move a0, s0 # restore jmpbuf
- INT_L v1, CALLFRAME_SIZ+_OFFSETOF_STACK_T_FLAGS(sp)
+ INT_L v1, CALLFRAME_SIZ+_STACK_T_FLAGS(sp)
# get old ss_onstack
and v1, v1, SS_ONSTACK # extract onstack flag
- INT_S v1, _OFFSETOF_SC_ONSTACK(a0) # save it in sc_onstack
+ INT_S v1, _SC_ONSTACK(a0) # save it in sc_onstack
REG_L s0, CALLFRAME_S0(sp) # restore S0
REG_L ra, CALLFRAME_RA(sp) # restore RA
- blt v0, zero, botch # check for sigaltstack() error
+ blt v0, zero, botch # check for sigaltstack() error
nop
/*
* We know we won't need this routine's GP anymore.
@@ -97,46 +97,46 @@
REG_PROLOGUE
- REG_S ra, _OFFSETOF_SC_PC(a0) # sc_pc = return address
- REG_LI v0, 0xACEDBADE # sigcontext magic number
- REG_S v0, _OFFSETOF_SC_REGS(a0) # saved in sc_regs[0]
- REG_S s0, _OFFSETOF_SC_REGS_S0(a0)
- REG_S s1, _OFFSETOF_SC_REGS_S1(a0)
- REG_S s2, _OFFSETOF_SC_REGS_S2(a0)
- REG_S s3, _OFFSETOF_SC_REGS_S3(a0)
- REG_S s4, _OFFSETOF_SC_REGS_S4(a0)
- REG_S s5, _OFFSETOF_SC_REGS_S5(a0)
- REG_S s6, _OFFSETOF_SC_REGS_S6(a0)
- REG_S s7, _OFFSETOF_SC_REGS_S7(a0)
- REG_S gp, _OFFSETOF_SC_REGS_GP(a0)
- REG_S sp, _OFFSETOF_SC_REGS_SP(a0)
- REG_S s8, _OFFSETOF_SC_REGS_S8(a0)
+ REG_S ra, _SC_PC(a0) # sc_pc = return address
+ REG_LI v0, 0xACEDBADE # sigcontext magic number
+ REG_S v0, _SC_REGS(a0) # saved in sc_regs[0]
+ REG_S s0, _SC_REGS_S0(a0)
+ REG_S s1, _SC_REGS_S1(a0)
+ REG_S s2, _SC_REGS_S2(a0)
+ REG_S s3, _SC_REGS_S3(a0)
+ REG_S s4, _SC_REGS_S4(a0)
+ REG_S s5, _SC_REGS_S5(a0)
+ REG_S s6, _SC_REGS_S6(a0)
+ REG_S s7, _SC_REGS_S7(a0)
+ REG_S gp, _SC_REGS_GP(a0)
+ REG_S sp, _SC_REGS_SP(a0)
+ REG_S s8, _SC_REGS_S8(a0)
#ifdef SOFTFLOAT_FOR_GCC
- INT_S zero, _OFFSETOF_SC_FPUSED(a0) # sc_fpused = 0
+ INT_S zero, _SC_FPUSED(a0) # sc_fpused = 0
#else
- li v0, 1 # be nice if we could tell
- INT_S v0, _OFFSETOF_SC_FPUSED(a0) # sc_fpused = 1
+ li v0, 1 # be nice if we could tell
+ INT_S v0, _SC_FPUSED(a0) # sc_fpused = 1
cfc1 v0, $31
- INT_S v0, _OFFSETOF_SC_FPREGS_FCSR(a0)
Home |
Main Index |
Thread Index |
Old Index