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[src/trunk]: src/sys/arch/mips/include Add definitions for the CP0 WatchLo/Wa...
details: https://anonhg.NetBSD.org/src/rev/7425e4c824df
branches: trunk
changeset: 936542:7425e4c824df
user: simonb <simonb%NetBSD.org@localhost>
date: Wed Jul 29 09:00:05 2020 +0000
description:
Add definitions for the CP0 WatchLo/WatchHi registers.
diffstat:
sys/arch/mips/include/cpuregs.h | 20 +++++++++++++++++++-
1 files changed, 19 insertions(+), 1 deletions(-)
diffs (34 lines):
diff -r ebd8127867ca -r 7425e4c824df sys/arch/mips/include/cpuregs.h
--- a/sys/arch/mips/include/cpuregs.h Wed Jul 29 07:14:45 2020 +0000
+++ b/sys/arch/mips/include/cpuregs.h Wed Jul 29 09:00:05 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuregs.h,v 1.105 2020/07/26 08:08:41 simonb Exp $ */
+/* $NetBSD: cpuregs.h,v 1.106 2020/07/29 09:00:05 simonb Exp $ */
/*
* Copyright (c) 2009 Miodrag Vallat.
@@ -842,6 +842,24 @@
#endif
/*
+ * WatchLo/WatchHi watchpoint registers
+ */
+#define MIPS_WATCHLO_VADDR32 __BITS(31,3) /* 32-bit addr */
+#define MIPS_WATCHLO_VADDR64 __BITS(63,3) /* 64-bit addr */
+#define MIPS_WATCHLO_INSN __BIT(2)
+#define MIPS_WATCHLO_DATA_READ __BIT(1)
+#define MIPS_WATCHLO_DATA_WRITE __BIT(0)
+
+#define MIPS_WATCHHI_M __BIT(31) /* next watch reg implemented */
+#define MIPS_WATCHHI_G __BIT(30) /* use WatchLo vaddr */
+#define MIPS_WATCHHI_EAS __BITS(25,24) /* extended ASID */
+#define MIPS_WATCHHI_ASID __BITS(23,16)
+#define MIPS_WATCHHI_MASK __BITS(11,3)
+#define MIPS_WATCHHI_INSN MIPS_WATCHLO_INSN
+#define MIPS_WATCHHI_DATA_READ MIPS_WATCHLO_DATA_READ
+#define MIPS_WATCHHI_DATA_WRITE MIPS_WATCHLO_DATA_WRITE
+
+/*
* RDHWR register numbers
*/
#define MIPS_HWR_CPUNUM _(0)
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