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[src/trunk]: src/sys/arch/arm/ti Fix dpll clock setting on am335x



details:   https://anonhg.NetBSD.org/src/rev/47446177caf8
branches:  trunk
changeset: 934017:47446177caf8
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Wed Jun 03 18:26:06 2020 +0000

description:
Fix dpll clock setting on am335x

diffstat:

 sys/arch/arm/ti/ti_dpll_clock.c |  8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diffs (36 lines):

diff -r 68ec95badfee -r 47446177caf8 sys/arch/arm/ti/ti_dpll_clock.c
--- a/sys/arch/arm/ti/ti_dpll_clock.c   Wed Jun 03 18:25:26 2020 +0000
+++ b/sys/arch/arm/ti/ti_dpll_clock.c   Wed Jun 03 18:26:06 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ti_dpll_clock.c,v 1.2 2019/10/29 22:19:13 jmcneill Exp $ */
+/* $NetBSD: ti_dpll_clock.c,v 1.3 2020/06/03 18:26:06 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ti_dpll_clock.c,v 1.2 2019/10/29 22:19:13 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ti_dpll_clock.c,v 1.3 2020/06/03 18:26:06 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -267,7 +267,7 @@
        control |= __SHIFTIN(AM3_DPLL_EN_NM_BYPASS, AM3_DPLL_EN);
        WR4(sc, REG_CONTROL, control);
 
-       while ((RD4(sc, REG_IDLEST) & AM3_ST_MN_BYPASS) != 0)
+       while (RD4(sc, REG_IDLEST) != AM3_ST_MN_BYPASS)
                ;
 
        mult_div1 = __SHIFTIN(mult, DPLL_MULT);
@@ -278,7 +278,7 @@
        control |= __SHIFTIN(AM3_DPLL_EN_LOCK, AM3_DPLL_EN);
        WR4(sc, REG_CONTROL, control);
 
-       while ((RD4(sc, REG_IDLEST) & AM3_ST_DPLL_CLK) != 0)
+       while (RD4(sc, REG_IDLEST) != AM3_ST_DPLL_CLK)
                ;    
 
        return 0;



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