Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/arch/mips/mips Remove duplicate confused code for enabli...



details:   https://anonhg.NetBSD.org/src/rev/9e85a0cd0526
branches:  trunk
changeset: 831015:9e85a0cd0526
user:      maya <maya%NetBSD.org@localhost>
date:      Wed Mar 07 20:43:53 2018 +0000

description:
Remove duplicate confused code for enabling 64bit addressing

diffstat:

 sys/arch/mips/mips/locore.S |  18 ++----------------
 1 files changed, 2 insertions(+), 16 deletions(-)

diffs (42 lines):

diff -r 4ac224fe0790 -r 9e85a0cd0526 sys/arch/mips/mips/locore.S
--- a/sys/arch/mips/mips/locore.S       Wed Mar 07 20:38:39 2018 +0000
+++ b/sys/arch/mips/mips/locore.S       Wed Mar 07 20:43:53 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.214 2018/03/07 15:56:33 maya Exp $        */
+/*     $NetBSD: locore.S,v 1.215 2018/03/07 20:43:53 maya Exp $        */
 
 /*
  * Copyright (c) 1992, 1993
@@ -63,7 +63,7 @@
 #include <mips/trap.h>
 #include <mips/locore.h>
 
-RCSID("$NetBSD: locore.S,v 1.214 2018/03/07 15:56:33 maya Exp $")
+RCSID("$NetBSD: locore.S,v 1.215 2018/03/07 20:43:53 maya Exp $")
 
 #include "assym.h"
 
@@ -143,23 +143,9 @@
 #endif
 
 #ifdef NOFPU /* No FPU; avoid touching FPU registers */
-#if !defined(emips)   /*  XXX??? we have already disabled interrupts! */
-#ifdef __mips_n32
-       li      t0, MIPS_SR_KX                  # turn on XKSEG and XKPHYS
-#elif defined(_LP64)
-       li      t0, MIPS_SR_KX | MIPS_SR_UX     # turn on XKSEG and XKPHYS
-#else
-       li      t0, 0                           # Disable interrupts and
-#endif /* n32 */
-       mtc0    t0, MIPS_COP_0_STATUS           # the fp coprocessor
-       COP0_SYNC
-#endif /* !emips */
 #else /* NOFPU */
        mfc0    t0, MIPS_COP_0_STATUS
        MFC0_HAZARD
-#if defined(_LP64) || defined(__mips_n32)
-       or      t0, MIPS_SR_KX                  # turn on XKSEG and XKPHYS
-#endif
        or      t0, MIPS_SR_COP_1_BIT           # Disable interrupts, and
        mtc0    t0, MIPS_COP_0_STATUS           # enable the fp coprocessor
        COP0_HAZARD_FPUENABLE



Home | Main Index | Thread Index | Old Index