Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys Rename pl061gpio to plgpio and split the device logic fr...
details: https://anonhg.NetBSD.org/src/rev/a5fe0d4b12d1
branches: trunk
changeset: 836408:a5fe0d4b12d1
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Mon Oct 15 23:50:48 2018 +0000
description:
Rename pl061gpio to plgpio and split the device logic from the FDT glue.
diffstat:
sys/arch/evbarm/conf/GENERIC64 | 4 +-
sys/arch/evbarm/conf/VIRT | 4 +-
sys/conf/files | 6 +-
sys/dev/fdt/files.fdt | 9 +-
sys/dev/fdt/pl061gpio_fdt.c | 160 +++++++++-------------------------------
sys/dev/ic/pl061.c | 116 +++++++++++++++++++++++++++++
sys/dev/ic/pl061var.h | 52 +++++++++++++
7 files changed, 219 insertions(+), 132 deletions(-)
diffs (truncated from 519 to 300 lines):
diff -r 5382a67ea078 -r a5fe0d4b12d1 sys/arch/evbarm/conf/GENERIC64
--- a/sys/arch/evbarm/conf/GENERIC64 Mon Oct 15 20:09:06 2018 +0000
+++ b/sys/arch/evbarm/conf/GENERIC64 Mon Oct 15 23:50:48 2018 +0000
@@ -1,5 +1,5 @@
#
-# $NetBSD: GENERIC64,v 1.47 2018/10/15 11:35:42 jmcneill Exp $
+# $NetBSD: GENERIC64,v 1.48 2018/10/15 23:50:48 jmcneill Exp $
#
# GENERIC ARM (aarch64) kernel
#
@@ -182,7 +182,7 @@
# GPIO controller
bcmgpio* at fdt? # Broadcom BCM283x GPIO
-pl061gpio* at fdt? # ARM PrimeCell PL061 GPIO
+plgpio* at fdt? # ARM PrimeCell PL061 GPIO
sunxigpio* at fdt? pass 3 # Allwinner GPIO
tegragpio* at fdt? pass 2 # NVIDIA Tegra GPIO
rkgpio* at rkiomux? # Rockchip GPIO
diff -r 5382a67ea078 -r a5fe0d4b12d1 sys/arch/evbarm/conf/VIRT
--- a/sys/arch/evbarm/conf/VIRT Mon Oct 15 20:09:06 2018 +0000
+++ b/sys/arch/evbarm/conf/VIRT Mon Oct 15 23:50:48 2018 +0000
@@ -1,5 +1,5 @@
#
-# $NetBSD: VIRT,v 1.7 2018/07/14 15:09:41 maxv Exp $
+# $NetBSD: VIRT,v 1.8 2018/10/15 23:50:48 jmcneill Exp $
#
# QEMU ARM 'virt' virtual machine
#
@@ -58,7 +58,7 @@
plrtc* at fdt? # ARM PrimeCell RTC
# GPIO
-pl061gpio* at fdt? # ARM PrimeCell GPIO
+plgpio* at fdt? # ARM PrimeCell GPIO
# Virtio devices
virtio* at fdt? # Virtio MMIO device
diff -r 5382a67ea078 -r a5fe0d4b12d1 sys/conf/files
--- a/sys/conf/files Mon Oct 15 20:09:06 2018 +0000
+++ b/sys/conf/files Mon Oct 15 23:50:48 2018 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files,v 1.1213 2018/09/23 09:21:03 maxv Exp $
+# $NetBSD: files,v 1.1214 2018/10/15 23:50:48 jmcneill Exp $
# @(#)files.newconf 7.5 (Berkeley) 5/10/93
version 20171118
@@ -1319,6 +1319,10 @@
device plkmi: pckbport
file dev/ic/pl050.c plkmi
+# ARM PrimeCell PL061 (GPIO) general purpose input/output
+device plgpio: gpiobus
+file dev/ic/pl061.c plgpio
+
# ARM PrimeCell PL181 (MMCI) host controller
device plmmc: sdmmcbus
file dev/ic/pl181.c plmmc
diff -r 5382a67ea078 -r a5fe0d4b12d1 sys/dev/fdt/files.fdt
--- a/sys/dev/fdt/files.fdt Mon Oct 15 20:09:06 2018 +0000
+++ b/sys/dev/fdt/files.fdt Mon Oct 15 23:50:48 2018 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.fdt,v 1.39 2018/10/06 16:28:21 skrll Exp $
+# $NetBSD: files.fdt,v 1.40 2018/10/15 23:50:48 jmcneill Exp $
include "external/bsd/libfdt/conf/files.libfdt"
@@ -123,10 +123,9 @@
attach qemufwcfg at fdt with qemufwcfg_fdt
file dev/fdt/qemufwcfg_fdt.c qemufwcfg_fdt
-# ARM PrimeCell General Purpose Input/Output (PL061)
-device pl061gpio: gpiobus
-attach pl061gpio at fdt with pl061gpio_fdt
-file dev/fdt/pl061gpio_fdt.c pl061gpio_fdt
+# ARM PrimeCell General Purpose Input/Output (PL061)
+attach plgpio at fdt with plgpio_fdt
+file dev/fdt/pl061gpio_fdt.c plgpio_fdt
# AHCI SATA controller
attach ahcisata at fdt with ahcisata_fdt
diff -r 5382a67ea078 -r a5fe0d4b12d1 sys/dev/fdt/pl061gpio_fdt.c
--- a/sys/dev/fdt/pl061gpio_fdt.c Mon Oct 15 20:09:06 2018 +0000
+++ b/sys/dev/fdt/pl061gpio_fdt.c Mon Oct 15 23:50:48 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pl061gpio_fdt.c,v 1.2 2018/09/03 23:19:01 jmcneill Exp $ */
+/* $NetBSD: pl061gpio_fdt.c,v 1.3 2018/10/15 23:50:48 jmcneill Exp $ */
/*
* Copyright (c) 2018 Jonathan A. Kollasch
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pl061gpio_fdt.c,v 1.2 2018/09/03 23:19:01 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pl061gpio_fdt.c,v 1.3 2018/10/15 23:50:48 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -39,58 +39,40 @@
#include <sys/gpio.h>
#include <dev/gpio/gpiovar.h>
-#include "gpio.h"
#include <dev/ic/pl061reg.h>
+#include <dev/ic/pl061var.h>
#include <dev/fdt/fdtvar.h>
-static int pl061_gpio_match(device_t, cfdata_t, void *);
-static void pl061_gpio_attach(device_t, device_t, void *);
+static int plgpio_fdt_match(device_t, cfdata_t, void *);
+static void plgpio_fdt_attach(device_t, device_t, void *);
-static void * pl061_gpio_fdt_acquire(device_t, const void *,
+static void * plgpio_fdt_acquire(device_t, const void *,
size_t, int);
-static void pl061_gpio_fdt_release(device_t, void *);
-static int pl061_gpio_fdt_read(device_t, void *, bool);
-static void pl061_gpio_fdt_write(device_t, void *, int, bool);
+static void plgpio_fdt_release(device_t, void *);
+static int plgpio_fdt_read(device_t, void *, bool);
+static void plgpio_fdt_write(device_t, void *, int, bool);
-struct fdtbus_gpio_controller_func pl061_gpio_funcs = {
- .acquire = pl061_gpio_fdt_acquire,
- .release = pl061_gpio_fdt_release,
- .read = pl061_gpio_fdt_read,
- .write = pl061_gpio_fdt_write
+struct fdtbus_gpio_controller_func plgpio_fdt_funcs = {
+ .acquire = plgpio_fdt_acquire,
+ .release = plgpio_fdt_release,
+ .read = plgpio_fdt_read,
+ .write = plgpio_fdt_write
};
-struct pl061_gpio_softc {
- device_t sc_dev;
- bus_space_tag_t sc_bst;
- bus_space_handle_t sc_bsh;
-
- struct gpio_chipset_tag sc_gc;
- gpio_pin_t sc_pins[8];
-};
-
-struct pl061_gpio_pin {
- struct pl061_gpio_softc *pin_sc;
+struct plgpio_fdt_pin {
+ struct plgpio_softc * pin_sc;
int pin_no;
u_int pin_flags;
bool pin_actlo;
};
-static int pl061_gpio_pin_read(void *, int);
-static void pl061_gpio_pin_write(void *, int, int);
-static void pl061_gpio_pin_ctl(void *, int, int);
-
-CFATTACH_DECL_NEW(pl061gpio_fdt, sizeof(struct pl061_gpio_softc),
- pl061_gpio_match, pl061_gpio_attach, NULL, NULL);
-
-#define PL061_WRITE(sc, reg, val) \
- bus_space_write_1((sc)->sc_bst, (sc)->sc_bsh, (reg)/4, (val))
-#define PL061_READ(sc, reg) \
- bus_space_read_1((sc)->sc_bst, (sc)->sc_bsh, (reg)/4)
+CFATTACH_DECL_NEW(plgpio_fdt, sizeof(struct plgpio_softc),
+ plgpio_fdt_match, plgpio_fdt_attach, NULL, NULL);
static int
-pl061_gpio_match(device_t parent, cfdata_t cf, void *aux)
+plgpio_fdt_match(device_t parent, cfdata_t cf, void *aux)
{
const char * const compatible[] = {
"arm,pl061",
@@ -102,16 +84,13 @@
}
static void
-pl061_gpio_attach(device_t parent, device_t self, void *aux)
+plgpio_fdt_attach(device_t parent, device_t self, void *aux)
{
- struct pl061_gpio_softc * const sc = device_private(self);
+ struct plgpio_softc * const sc = device_private(self);
struct fdt_attach_args * const faa = aux;
bus_addr_t addr;
bus_size_t size;
int error;
- struct gpiobus_attach_args gba;
- u_int pin;
-
if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
aprint_error(": couldn't get registers\n");
@@ -129,80 +108,17 @@
aprint_naive("\n");
aprint_normal(": GPIO\n");
- sc->sc_gc.gp_cookie = sc;
- sc->sc_gc.gp_pin_read = pl061_gpio_pin_read;
- sc->sc_gc.gp_pin_write = pl061_gpio_pin_write;
- sc->sc_gc.gp_pin_ctl = pl061_gpio_pin_ctl;
-
- const uint32_t cnf = PL061_READ(sc, PL061_GPIOAFSEL_REG);
-
- for (pin = 0; pin < 8; pin++) {
- sc->sc_pins[pin].pin_num = pin;
- /* skip pins in hardware control mode */
- if ((cnf & __BIT(pin)) != 0)
- continue;
- sc->sc_pins[pin].pin_caps =
- GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
- GPIO_PIN_TRISTATE;
- sc->sc_pins[pin].pin_state =
- pl061_gpio_pin_read(sc, pin);
- }
-
- memset(&gba, 0, sizeof(gba));
- gba.gba_gc = &sc->sc_gc;
- gba.gba_pins = sc->sc_pins;
- gba.gba_npins = 8;
-
-#if NGPIO > 0
- (void)config_found_ia(sc->sc_dev, "gpiobus", &gba,
- gpiobus_print);
-#endif
+ plgpio_attach(sc);
fdtbus_register_gpio_controller(self, faa->faa_phandle,
- &pl061_gpio_funcs);
-
-}
-
-static int
-pl061_gpio_pin_read(void *priv, int pin)
-{
- struct pl061_gpio_softc * const sc = priv;
-
- const uint32_t v = PL061_READ(sc, PL061_GPIODATA_REG(1<<pin));
-
- return (v >> pin) & 1;
-}
-
-static void
-pl061_gpio_pin_write(void *priv, int pin, int val)
-{
- struct pl061_gpio_softc * const sc = priv;
-
- PL061_WRITE(sc, PL061_GPIODATA_REG(1 << pin), val << pin);
-}
-
-static void
-pl061_gpio_pin_ctl(void *priv, int pin, int flags)
-{
- struct pl061_gpio_softc * const sc = priv;
- uint32_t v;
-
- if (flags & GPIO_PIN_INPUT) {
- v = PL061_READ(sc, PL061_GPIODIR_REG);
- v &= ~(1 << pin);
- PL061_WRITE(sc, PL061_GPIODIR_REG, v);
- } else if (flags & GPIO_PIN_OUTPUT) {
- v = PL061_READ(sc, PL061_GPIODIR_REG);
- v |= (1 << pin);
- PL061_WRITE(sc, PL061_GPIODIR_REG, v);
- }
+ &plgpio_fdt_funcs);
}
static void *
-pl061_gpio_fdt_acquire(device_t dev, const void *data, size_t len, int flags)
+plgpio_fdt_acquire(device_t dev, const void *data, size_t len, int flags)
{
- struct pl061_gpio_softc * const sc = device_private(dev);
- struct pl061_gpio_pin *gpin;
+ struct plgpio_softc * const sc = device_private(dev);
+ struct plgpio_fdt_pin *gpin;
const u_int *gpio = data;
if (len != 12)
@@ -214,9 +130,9 @@
if (pin > 8)
return NULL;
- const uint32_t cnf = PL061_READ(sc, PL061_GPIOAFSEL_REG);
+ const uint32_t cnf = PLGPIO_READ(sc, PL061_GPIOAFSEL_REG);
if ((cnf & __BIT(pin)) != 0)
- PL061_WRITE(sc, PL061_GPIOAFSEL_REG, cnf & ~__BIT(pin));
+ PLGPIO_WRITE(sc, PL061_GPIOAFSEL_REG, cnf & ~__BIT(pin));
gpin = kmem_zalloc(sizeof(*gpin), KM_SLEEP);
gpin->pin_sc = sc;
@@ -224,27 +140,27 @@
gpin->pin_flags = flags;
gpin->pin_actlo = actlo;
- pl061_gpio_pin_ctl(gpin->pin_sc, gpin->pin_no, gpin->pin_flags);
+ plgpio_pin_ctl(gpin->pin_sc, gpin->pin_no, gpin->pin_flags);
return gpin;
Home |
Main Index |
Thread Index |
Old Index