[src/trunk]: src/sys/arch/mips/mips Typo in comment

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/da48a4fdad27
branches:  trunk
changeset: 817277:da48a4fdad27
user:      skrll <skrll%NetBSD.org@localhost>
date:      Mon Aug 15 14:44:44 2016 +0000

description:
Typo in comment

diffstat:

 sys/arch/mips/mips/mipsX_subr.S |  4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diffs (18 lines):

diff -r 81d813b82acd -r da48a4fdad27 sys/arch/mips/mips/mipsX_subr.S
--- a/sys/arch/mips/mips/mipsX_subr.S   Mon Aug 15 14:26:48 2016 +0000
+++ b/sys/arch/mips/mips/mipsX_subr.S   Mon Aug 15 14:44:44 2016 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mipsX_subr.S,v 1.88 2016/08/15 14:26:48 skrll Exp $    */
+/*     $NetBSD: mipsX_subr.S,v 1.89 2016/08/15 14:44:44 skrll Exp $    */
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -360,7 +360,7 @@
  *
  * Loongson2 processors don't have separate tlbmiss and xtlbmiss handlers;
  * so we have to check for useg addresses in tlb_miss. The good news is that
- * we can use 64 intructions form tlbmiss instead of 32.
+ * we can use 64 intructions from tlbmiss instead of 32.
  *
  *----------------------------------------------------------------------------
  */