[src/trunk]: src/sys/arch/arm/arm Use movw/movw

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/4b7998ceb7cf
branches:  trunk
changeset: 808349:4b7998ceb7cf
user:      matt <matt%NetBSD.org@localhost>
date:      Thu May 14 17:15:56 2015 +0000

description:
Use movw/movw

diffstat:

 sys/arch/arm/arm/cpufunc_asm_pj4b.S |  8 +++-----
 1 files changed, 3 insertions(+), 5 deletions(-)

diffs (29 lines):

diff -r af973703758c -r 4b7998ceb7cf sys/arch/arm/arm/cpufunc_asm_pj4b.S
--- a/sys/arch/arm/arm/cpufunc_asm_pj4b.S       Thu May 14 13:59:57 2015 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_pj4b.S       Thu May 14 17:15:56 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc_asm_pj4b.S,v 1.8 2015/05/14 05:39:32 hsuenaga Exp $ */
+/*     $NetBSD: cpufunc_asm_pj4b.S,v 1.9 2015/05/14 17:15:56 matt Exp $ */
 
 /*******************************************************************************
 Copyright (C) Marvell International Ltd. and its affiliates
@@ -41,9 +41,6 @@
 #include <arm/asm.h>
 #include <arm/locore.h>
 
-.Lpj4b_l2_barrier_reg:
-       .word   _C_LABEL(armadaxp_l2_barrier_reg)
-
 /* LINTSTUB: void pj4b_cpu_sleep(int); */
 ENTRY(pj4b_cpu_sleep)
        dsb
@@ -92,7 +89,8 @@
 
 /* LINTSTUB: void pj4b_io_coherency_barrier(vaddr_t, paddr_t, vsize_t); */
 ENTRY_NP(pj4b_io_coherency_barrier)
-       ldr     r0, .Lpj4b_l2_barrier_reg
+       movw    r0, #:lower16:_C_LABEL(armadaxp_l2_barrier_reg)
+       movt    r0, #:upper16:_C_LABEL(armadaxp_l2_barrier_reg)
        ldr     r0, [r0]        @ MVSOC_MLMB_CIB_BARRIER
        mov     r1, #1          @ MVSOC_MLMB_CIB_BARRIER_TRIGGER
        str     r1, [r0]