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[src/netbsd-9]: src/sys/arch/arm/ti Pull up following revision(s) (requested ...
details: https://anonhg.NetBSD.org/src/rev/820ce71e8ea0
branches: netbsd-9
changeset: 843616:820ce71e8ea0
user: martin <martin%NetBSD.org@localhost>
date: Sun Dec 08 12:54:10 2019 +0000
description:
Pull up following revision(s) (requested by jmcneill in ticket #497):
sys/arch/arm/ti/ti_sdhc.c: revision 1.4
sys/arch/arm/ti/ti_sdhc.c: revision 1.5
sys/arch/arm/ti/am3_prcm.c: revision 1.11
Fix mmc and timer indexes.
Fix inverted ti,needs-special-hs-handling property logic and enable EDMA support
Support 1-bit mode and force all xfers to bounce to workaround a transfer error issue for now
diffstat:
sys/arch/arm/ti/am3_prcm.c | 12 ++++++------
sys/arch/arm/ti/ti_sdhc.c | 46 ++++++++++++++++++++++++++--------------------
2 files changed, 32 insertions(+), 26 deletions(-)
diffs (165 lines):
diff -r 3048a98b62f9 -r 820ce71e8ea0 sys/arch/arm/ti/am3_prcm.c
--- a/sys/arch/arm/ti/am3_prcm.c Sun Dec 08 12:50:44 2019 +0000
+++ b/sys/arch/arm/ti/am3_prcm.c Sun Dec 08 12:54:10 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: am3_prcm.c,v 1.1.10.1 2019/11/27 13:46:44 martin Exp $ */
+/* $NetBSD: am3_prcm.c,v 1.1.10.2 2019/12/08 12:54:10 martin Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: am3_prcm.c,v 1.1.10.1 2019/11/27 13:46:44 martin Exp $");
+__KERNEL_RCSID(1, "$NetBSD: am3_prcm.c,v 1.1.10.2 2019/12/08 12:54:10 martin Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -161,7 +161,7 @@
AM3_PRCM_HWMOD_PER("gpio3", 0xb0, "PERIPH_CLK"),
AM3_PRCM_HWMOD_PER("gpio4", 0xb4, "PERIPH_CLK"),
- AM3_PRCM_HWMOD_WKUP("timer0", 0x10, "FIXED_32K"),
+ AM3_PRCM_HWMOD_WKUP("timer1", 0x10, "FIXED_32K"),
AM3_PRCM_HWMOD_PER("timer2", 0x80, "FIXED_24MHZ"),
AM3_PRCM_HWMOD_PER("timer3", 0x84, "FIXED_24MHZ"),
AM3_PRCM_HWMOD_PER("timer4", 0x88, "FIXED_24MHZ"),
@@ -169,9 +169,9 @@
AM3_PRCM_HWMOD_PER("timer6", 0xf0, "FIXED_24MHZ"),
AM3_PRCM_HWMOD_PER("timer7", 0x7c, "FIXED_24MHZ"),
- AM3_PRCM_HWMOD_PER("mmc0", 0x3c, "MMC_CLK"),
- AM3_PRCM_HWMOD_PER("mmc1", 0xf4, "MMC_CLK"),
- AM3_PRCM_HWMOD_PER("mmc2", 0xf8, "MMC_CLK"),
+ AM3_PRCM_HWMOD_PER("mmc1", 0x3c, "MMC_CLK"),
+ AM3_PRCM_HWMOD_PER("mmc2", 0xf4, "MMC_CLK"),
+ AM3_PRCM_HWMOD_PER("mmc3", 0xf8, "MMC_CLK"),
AM3_PRCM_HWMOD_PER("tpcc", 0xbc, "PERIPH_CLK"),
AM3_PRCM_HWMOD_PER("tptc0", 0x24, "PERIPH_CLK"),
diff -r 3048a98b62f9 -r 820ce71e8ea0 sys/arch/arm/ti/ti_sdhc.c
--- a/sys/arch/arm/ti/ti_sdhc.c Sun Dec 08 12:50:44 2019 +0000
+++ b/sys/arch/arm/ti/ti_sdhc.c Sun Dec 08 12:54:10 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ti_sdhc.c,v 1.3.2.2 2019/11/27 13:46:44 martin Exp $ */
+/* $NetBSD: ti_sdhc.c,v 1.3.2.3 2019/12/08 12:54:10 martin Exp $ */
/*-
* Copyright (c) 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ti_sdhc.c,v 1.3.2.2 2019/11/27 13:46:44 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ti_sdhc.c,v 1.3.2.3 2019/12/08 12:54:10 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -180,7 +180,6 @@
sc->sc_addr = addr;
sc->sc_bst = faa->faa_bst;
-#if notyet
/* XXX use fdtbus_dma API */
int len;
const u_int *dmas = fdtbus_get_prop(phandle, "dmas", &len);
@@ -198,10 +197,6 @@
sc->sc_edma_chan[EDMA_CHAN_RX] = -1;
break;
}
-#else
- sc->sc_edma_chan[EDMA_CHAN_TX] = -1;
- sc->sc_edma_chan[EDMA_CHAN_RX] = -1;
-#endif
if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
aprint_error(": couldn't map registers\n");
@@ -219,7 +214,7 @@
sc->sc.sc_flags |= SDHC_FLAG_8BIT_MODE;
if (of_hasprop(phandle, "ti,needs-special-reset"))
sc->sc.sc_flags |= SDHC_FLAG_WAIT_RESET;
- if (of_hasprop(phandle, "ti,needs-special-hs-handling"))
+ if (!of_hasprop(phandle, "ti,needs-special-hs-handling"))
sc->sc.sc_flags |= SDHC_FLAG_NO_HS_BIT;
if (of_hasprop(phandle, "ti,dual-volt"))
sc->sc.sc_caps = SDHC_VOLTAGE_SUPP_3_0V;
@@ -433,15 +428,21 @@
ti_sdhc_bus_width(struct sdhc_softc *sc, int width)
{
struct ti_sdhc_softc *hmsc = (struct ti_sdhc_softc *)sc;
- uint32_t con;
+ uint32_t con, hctl;
con = bus_space_read_4(hmsc->sc_bst, hmsc->sc_bsh, MMCHS_CON);
+ hctl = SDHC_READ(hmsc, SDHC_HOST_CTL);
if (width == 8) {
con |= CON_DW8;
+ } else if (width == 4) {
+ con &= ~CON_DW8;
+ hctl |= SDHC_4BIT_MODE;
} else {
con &= ~CON_DW8;
+ hctl &= ~SDHC_4BIT_MODE;
}
bus_space_write_4(hmsc->sc_bst, hmsc->sc_bsh, MMCHS_CON, con);
+ SDHC_WRITE(hmsc, SDHC_HOST_CTL, hctl);
return 0;
}
@@ -492,6 +493,13 @@
error);
return error;
}
+ error = bus_dmamap_load(sc->sc.sc_dmat, sc->sc_edma_dmamap,
+ sc->sc_edma_bbuf, MAXPHYS, NULL, BUS_DMA_WAITOK);
+ if (error) {
+ device_printf(sc->sc.sc_dev, "couldn't load dmamap: %d\n",
+ error);
+ return error;
+ }
return error;
}
@@ -501,24 +509,23 @@
{
struct ti_sdhc_softc *sc = device_private(sdhc_sc->sc_dev);
const bus_dmamap_t map = cmd->c_dmamap;
- int seg, error;
bool bounce;
+ int error;
- for (bounce = false, seg = 0; seg < cmd->c_dmamap->dm_nsegs; seg++) {
- if ((cmd->c_dmamap->dm_segs[seg].ds_addr & 0x1f) != 0) {
+#if notyet
+ bounce = false;
+ for (int seg = 0; seg < cmd->c_dmamap->dm_nsegs; seg++) {
+ if ((cmd->c_dmamap->dm_segs[seg].ds_addr & 0x1f) != 0 ||
+ (cmd->c_dmamap->dm_segs[seg].ds_len & 3) != 0) {
bounce = true;
break;
}
}
+#else
+ bounce = true;
+#endif
if (bounce) {
- error = bus_dmamap_load(sc->sc.sc_dmat, sc->sc_edma_dmamap,
- sc->sc_edma_bbuf, MAXPHYS, NULL, BUS_DMA_WAITOK);
- if (error) {
- device_printf(sc->sc.sc_dev,
- "[bounce] bus_dmamap_load failed: %d\n", error);
- return error;
- }
if (ISSET(cmd->c_flags, SCF_CMD_READ)) {
bus_dmamap_sync(sc->sc.sc_dmat, sc->sc_edma_dmamap, 0,
MAXPHYS, BUS_DMASYNC_PREREAD);
@@ -541,7 +548,6 @@
bus_dmamap_sync(sc->sc.sc_dmat, sc->sc_edma_dmamap, 0,
MAXPHYS, BUS_DMASYNC_POSTWRITE);
}
- bus_dmamap_unload(sc->sc.sc_dmat, sc->sc_edma_dmamap);
if (ISSET(cmd->c_flags, SCF_CMD_READ) && error == 0) {
memcpy(cmd->c_data, sc->sc_edma_bbuf, cmd->c_datalen);
}
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