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[src/trunk]: src/sys/arch/mips/ingenic add memory controller registers
details: https://anonhg.NetBSD.org/src/rev/f434eaa101cb
branches: trunk
changeset: 806736:f434eaa101cb
user: macallan <macallan%NetBSD.org@localhost>
date: Sat Mar 07 15:36:16 2015 +0000
description:
add memory controller registers
diffstat:
sys/arch/mips/ingenic/ingenic_regs.h | 9 ++++++++-
1 files changed, 8 insertions(+), 1 deletions(-)
diffs (21 lines):
diff -r 2c90c91e03f5 -r f434eaa101cb sys/arch/mips/ingenic/ingenic_regs.h
--- a/sys/arch/mips/ingenic/ingenic_regs.h Sat Mar 07 15:35:33 2015 +0000
+++ b/sys/arch/mips/ingenic/ingenic_regs.h Sat Mar 07 15:36:16 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ingenic_regs.h,v 1.6 2014/12/25 05:10:00 macallan Exp $ */
+/* $NetBSD: ingenic_regs.h,v 1.7 2015/03/07 15:36:16 macallan Exp $ */
/*-
* Copyright (c) 2014 Michael Lorenz
@@ -249,4 +249,11 @@
#define JZ_DMR1 0x10001044 /* mask for PDMA */
#define JZ_DPR1 0x10001048 /* pending for PDMA */
+/* memory controller */
+#define JZ_DMMAP0 0x13010024
+#define JZ_DMMAP1 0x13010028
+ #define DMMAP_BASE 0x0000ff00 /* base PADDR of memory chunk */
+ #define DMMAP_MASK 0x000000ff /* mask which bits of PADDR are
+ * constant */
+
#endif /* INGENIC_REGS_H */
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