Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch Allow for choosing between 16 and 24bpp framebuffer...
details: https://anonhg.NetBSD.org/src/rev/dd7b4dd23d6b
branches: trunk
changeset: 807270:dd7b4dd23d6b
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Fri Apr 03 18:03:05 2015 +0000
description:
Allow for choosing between 16 and 24bpp framebuffers. The default is now
16 instead of 24. Set 'fb.depth=16' or 'fb.depth=24' on kernel command-line
to explicitly select a colour depth.
diffstat:
sys/arch/arm/amlogic/amlogic_genfb.c | 80 +++++++++++++++++++++++++-----
sys/arch/arm/amlogic/amlogic_vpureg.h | 30 +++++++++++-
sys/arch/evbarm/amlogic/amlogic_machdep.c | 10 ++-
3 files changed, 103 insertions(+), 17 deletions(-)
diffs (265 lines):
diff -r 086ebc12da25 -r dd7b4dd23d6b sys/arch/arm/amlogic/amlogic_genfb.c
--- a/sys/arch/arm/amlogic/amlogic_genfb.c Fri Apr 03 18:00:25 2015 +0000
+++ b/sys/arch/arm/amlogic/amlogic_genfb.c Fri Apr 03 18:03:05 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: amlogic_genfb.c,v 1.4 2015/03/26 16:26:35 joerg Exp $ */
+/* $NetBSD: amlogic_genfb.c,v 1.5 2015/04/03 18:03:05 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amlogic_genfb.c,v 1.4 2015/03/26 16:26:35 joerg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amlogic_genfb.c,v 1.5 2015/04/03 18:03:05 jmcneill Exp $");
#include <sys/param.h>
#include <sys/types.h>
@@ -50,6 +50,8 @@
#include <dev/wsfb/genfbvar.h>
+#define AMLOGIC_GENFB_DEFAULT_DEPTH 16
+
/* Map CEA-861-D video code (VIC) to framebuffer dimensions */
static const struct amlogic_genfb_vic2mode {
u_int vic;
@@ -268,12 +270,13 @@
prop_dictionary_t cfg = device_properties(sc->sc_gen.sc_dev);
const paddr_t pa = sc->sc_dmamap->dm_segs[0].ds_addr;
uint32_t datal, datah, addr;
- u_int width, height;
+ u_int width, height, depth;
prop_dictionary_get_uint32(cfg, "width", &width);
prop_dictionary_get_uint32(cfg, "height", &height);
+ prop_dictionary_get_uint32(cfg, "depth", &depth);
- const uint32_t w = (width * 3) >> 3;
+ const uint32_t w = (width * (depth/8)) >> 3;
const uint32_t h = height;
datal = CAV_READ(sc, DC_CAV_LUT_DATAL_REG);
@@ -303,17 +306,56 @@
amlogic_genfb_osd_config(struct amlogic_genfb_softc *sc)
{
prop_dictionary_t cfg = device_properties(sc->sc_gen.sc_dev);
- uint32_t w0, w1, w2, w3, w4;
- u_int width, height;
+ uint32_t cs, tc, w0, w1, w2, w3, w4;
+ u_int width, height, depth;
bool interlace_p;
prop_dictionary_get_uint32(cfg, "width", &width);
prop_dictionary_get_uint32(cfg, "height", &height);
+ prop_dictionary_get_uint32(cfg, "depth", &depth);
prop_dictionary_get_bool(cfg, "interlace", &interlace_p);
+ cs = VPU_READ(sc, VIU_OSD2_CTRL_STAT_REG);
+ cs |= VIU_OSD_CTRL_STAT_ENABLE;
+ cs &= ~VIU_OSD_CTRL_STAT_GLOBAL_ALPHA;
+ cs |= __SHIFTIN(0xff, VIU_OSD_CTRL_STAT_GLOBAL_ALPHA);
+ cs |= VIU_OSD_CTRL_STAT_BLK0_ENABLE;
+ cs &= ~VIU_OSD_CTRL_STAT_BLK1_ENABLE;
+ cs &= ~VIU_OSD_CTRL_STAT_BLK2_ENABLE;
+ cs &= ~VIU_OSD_CTRL_STAT_BLK3_ENABLE;
+ VPU_WRITE(sc, VIU_OSD2_CTRL_STAT_REG, cs);
+
+ tc = __SHIFTIN(0, VIU_OSD_TCOLOR_R) |
+ __SHIFTIN(0, VIU_OSD_TCOLOR_G) |
+ __SHIFTIN(0, VIU_OSD_TCOLOR_B) |
+ __SHIFTIN(255, VIU_OSD_TCOLOR_A);
+ VPU_WRITE(sc, VIU_OSD2_TCOLOR_AG0_REG, tc);
+
w0 = VPU_READ(sc, VIU_OSD2_BLK0_CFG_W0_REG);
+ w0 |= VIU_OSD_BLK_CFG_W0_RGB_EN;
+ w0 &= ~VIU_OSD_BLK_CFG_W0_TC_ALPHA_EN;
w0 &= ~VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE;
- w0 |= __SHIFTIN(7, VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE);
+ w0 &= ~VIU_OSD_BLK_CFG_W0_COLOR_MATRIX;
+ switch (depth) {
+ case 32:
+ w0 |= __SHIFTIN(VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_32BPP,
+ VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE);
+ w0 |= __SHIFTIN(VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_ARGB,
+ VIU_OSD_BLK_CFG_W0_COLOR_MATRIX);
+ break;
+ case 24:
+ w0 |= __SHIFTIN(VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_24BPP,
+ VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE);
+ w0 |= __SHIFTIN(VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_RGB,
+ VIU_OSD_BLK_CFG_W0_COLOR_MATRIX);
+ break;
+ case 16:
+ w0 |= __SHIFTIN(VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_16BPP,
+ VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE);
+ w0 |= __SHIFTIN(VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_RGB565,
+ VIU_OSD_BLK_CFG_W0_COLOR_MATRIX);
+ break;
+ }
w0 |= VIU_OSD_BLK_CFG_W0_LITTLE_ENDIAN;
w0 &= ~VIU_OSD_BLK_CFG_W0_RPT_Y;
w0 &= ~VIU_OSD_BLK_CFG_W0_INTERP_CTRL;
@@ -322,8 +364,6 @@
} else {
w0 &= ~VIU_OSD_BLK_CFG_W0_INTERLACE_EN;
}
- w0 |= VIU_OSD_BLK_CFG_W0_RGB_EN;
- w0 &= ~VIU_OSD_BLK_CFG_W0_COLOR_MATRIX;
VPU_WRITE(sc, VIU_OSD2_BLK0_CFG_W0_REG, w0);
w1 = __SHIFTIN(width - 1, VIU_OSD_BLK_CFG_W1_X_END) |
@@ -456,7 +496,7 @@
{
prop_dictionary_t cfg = device_properties(sc->sc_gen.sc_dev);
const struct sysctlnode *node, *devnode;
- u_int width = 0, height = 0, flags, i, scale = 100;
+ u_int width = 0, height = 0, depth, flags, i, scale = 100;
int error;
/*
@@ -479,7 +519,22 @@
return;
}
- const uint32_t fbsize = width * height * 3;
+ depth = AMLOGIC_GENFB_DEFAULT_DEPTH;
+ prop_dictionary_get_uint32(cfg, "depth", &depth);
+ switch (depth) {
+ case 16:
+ case 24:
+ break;
+ default:
+ aprint_error_dev(sc->sc_gen.sc_dev,
+ "unsupported depth %d, using %d\n", depth,
+ AMLOGIC_GENFB_DEFAULT_DEPTH);
+ depth = AMLOGIC_GENFB_DEFAULT_DEPTH;
+ break;
+ }
+ prop_dictionary_set_uint8(cfg, "depth", depth);
+
+ const uint32_t fbsize = width * height * (depth / 8);
sc->sc_dmasize = (fbsize + 3) & ~3;
error = amlogic_genfb_alloc_videomem(sc);
@@ -502,8 +557,7 @@
prop_dictionary_set_uint32(cfg, "height", height);
prop_dictionary_set_bool(cfg, "dblscan", !!(flags & DBLSCAN));
prop_dictionary_set_bool(cfg, "interlace", !!(flags & INTERLACE));
- prop_dictionary_set_uint8(cfg, "depth", 24);
- prop_dictionary_set_uint16(cfg, "linebytes", width * 3);
+ prop_dictionary_set_uint16(cfg, "linebytes", width * (depth / 8));
prop_dictionary_set_uint32(cfg, "address", 0);
prop_dictionary_set_uint32(cfg, "virtual_address",
(uintptr_t)sc->sc_dmap);
diff -r 086ebc12da25 -r dd7b4dd23d6b sys/arch/arm/amlogic/amlogic_vpureg.h
--- a/sys/arch/arm/amlogic/amlogic_vpureg.h Fri Apr 03 18:00:25 2015 +0000
+++ b/sys/arch/arm/amlogic/amlogic_vpureg.h Fri Apr 03 18:03:05 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: amlogic_vpureg.h,v 1.2 2015/03/22 13:53:33 jmcneill Exp $ */
+/* $NetBSD: amlogic_vpureg.h,v 1.3 2015/04/03 18:03:05 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -32,6 +32,10 @@
#define VPU_REG(n) ((n) << 2)
#define VIU_OSD2_CTRL_STAT_REG VPU_REG(0x1a30)
+#define VIU_OSD2_TCOLOR_AG0_REG VPU_REG(0x1a37)
+#define VIU_OSD2_TCOLOR_AG1_REG VPU_REG(0x1a38)
+#define VIU_OSD2_TCOLOR_AG2_REG VPU_REG(0x1a39)
+#define VIU_OSD2_TCOLOR_AG3_REG VPU_REG(0x1a3a)
#define VIU_OSD2_BLK0_CFG_W0_REG VPU_REG(0x1a3b)
#define VIU_OSD2_BLK0_CFG_W1_REG VPU_REG(0x1a3c)
#define VIU_OSD2_BLK0_CFG_W2_REG VPU_REG(0x1a3d)
@@ -51,19 +55,38 @@
#define VPP_OSD_SCO_V_REG VPU_REG(0x1dcb)
#define VIU_OSD_CTRL_STAT_ENABLE __BIT(21)
+#define VIU_OSD_CTRL_STAT_GLOBAL_ALPHA __BITS(20,12)
#define VIU_OSD_CTRL_STAT_BLK3_ENABLE __BIT(3)
#define VIU_OSD_CTRL_STAT_BLK2_ENABLE __BIT(2)
#define VIU_OSD_CTRL_STAT_BLK1_ENABLE __BIT(1)
#define VIU_OSD_CTRL_STAT_BLK0_ENABLE __BIT(0)
+#define VIU_OSD_TCOLOR_R __BITS(31,24)
+#define VIU_OSD_TCOLOR_G __BITS(23,16)
+#define VIU_OSD_TCOLOR_B __BITS(15,8)
+#define VIU_OSD_TCOLOR_A __BITS(7,0)
+
#define VIU_OSD_BLK_CFG_W0_TBL_ADDR __BITS(23,16)
#define VIU_OSD_BLK_CFG_W0_LITTLE_ENDIAN __BIT(15)
#define VIU_OSD_BLK_CFG_W0_RPT_Y __BIT(14)
#define VIU_OSD_BLK_CFG_W0_INTERP_CTRL __BITS(13,12)
#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE __BITS(11,8)
+#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_PAL4 0
+#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_PAL16 1
+#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_PAL256 2
+#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_YUV 3
+#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_16BPP 4
+#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_32BPP 5
+#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_24BPP 7
#define VIU_OSD_BLK_CFG_W0_RGB_EN __BIT(7)
#define VIU_OSD_BLK_CFG_W0_TC_ALPHA_EN __BIT(6)
#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX __BITS(5,2)
+#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_RGB 0
+#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_RGBA 0
+#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_ARGB 1
+#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_ABGR 2
+#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_BGRA 3
+#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_RGB565 4
#define VIU_OSD_BLK_CFG_W0_INTERLACE_EN __BIT(1)
#define VIU_OSD_BLK_CFG_W0_INTERLACE_SEL_ODD __BIT(0)
@@ -79,7 +102,12 @@
#define VIU_OSD_BLK_CFG_W4_V_END __BITS(27,16)
#define VIU_OSD_BLK_CFG_W4_V_START __BITS(11,0)
+#define VPP_MISC_OSD2_PREBLEND __BIT(17)
+#define VPP_MISC_OSD1_PREBLEND __BIT(16)
+#define VPP_MISC_OSD2_POSTBLEND __BIT(13)
+#define VPP_MISC_OSD1_POSTBLEND __BIT(12)
#define VPP_MISC_POSTBLEND __BIT(7)
+#define VPP_MISC_PREBLEND __BIT(6)
#define VPP_OSD_VSC_PHASE_STEP_FORMAT __BITS(27,0)
diff -r 086ebc12da25 -r dd7b4dd23d6b sys/arch/evbarm/amlogic/amlogic_machdep.c
--- a/sys/arch/evbarm/amlogic/amlogic_machdep.c Fri Apr 03 18:00:25 2015 +0000
+++ b/sys/arch/evbarm/amlogic/amlogic_machdep.c Fri Apr 03 18:03:05 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: amlogic_machdep.c,v 1.19 2015/03/29 22:49:44 jmcneill Exp $ */
+/* $NetBSD: amlogic_machdep.c,v 1.20 2015/04/03 18:03:05 jmcneill Exp $ */
/*
* Machine dependent functions for kernel setup for TI OSK5912 board.
@@ -125,7 +125,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amlogic_machdep.c,v 1.19 2015/03/29 22:49:44 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amlogic_machdep.c,v 1.20 2015/04/03 18:03:05 jmcneill Exp $");
#include "opt_machdep.h"
#include "opt_ddb.h"
@@ -545,7 +545,7 @@
#if NGENFB > 0
if (device_is_a(self, "genfb")) {
char *ptr;
- int scale;
+ int scale, depth;
amlogic_genfb_set_console_dev(self);
#ifdef DDB
db_trap_callback = amlogic_genfb_ddb_trap_callback;
@@ -563,6 +563,10 @@
BOOTOPT_TYPE_INT, &scale) && scale > 0) {
prop_dictionary_set_uint32(dict, "scale", scale);
}
+ if (get_bootconf_option(boot_args, "fb.depth",
+ BOOTOPT_TYPE_INT, &depth)) {
+ prop_dictionary_set_uint32(dict, "depth", depth);
+ }
}
#endif
}
Home |
Main Index |
Thread Index |
Old Index