[src/netbsd-8]: src/sys/arch/powerpc/include Pull up following revision(s) (r...

[snj <snj%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/06d08ee97617
branches:  netbsd-8
changeset: 851041:06d08ee97617
user:      snj <snj%NetBSD.org@localhost>
date:      Sat Sep 23 17:56:31 2017 +0000

description:
Pull up following revision(s) (requested by phx in ticket #291):
        sys/arch/powerpc/include/fenv.h: revision 1.4
Fixed feholdexcept() by copying the actual contents of FPSCR to the fenv_t
instead of a double precision floating point representation of it.

diffstat:

 sys/arch/powerpc/include/fenv.h |  4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diffs (18 lines):

diff -r ea8bb019c025 -r 06d08ee97617 sys/arch/powerpc/include/fenv.h
--- a/sys/arch/powerpc/include/fenv.h   Sat Sep 23 17:55:13 2017 +0000
+++ b/sys/arch/powerpc/include/fenv.h   Sat Sep 23 17:56:31 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fenv.h,v 1.3 2017/03/22 23:11:09 chs Exp $     */
+/*     $NetBSD: fenv.h,v 1.3.6.1 2017/09/23 17:56:31 snj Exp $ */
 
 /*-
  * Copyright (c) 2004-2005 David Schultz <das%FreeBSD.ORG@localhost>
@@ -242,7 +242,7 @@
        uint32_t msr;
 
        __mffs(&__r.__d);
-       *__envp = __r.__d;
+       *__envp = __r.__bits.__reg;
        __r.__bits.__reg &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
        __mtfsf(__r.__d);
        __updatemsr(__r.__bits.__reg);