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[src/trunk]: src/sys/arch/mips Change MIPS to use the common pmap code.
details: https://anonhg.NetBSD.org/src/rev/7564da98c692
branches: trunk
changeset: 816534:7564da98c692
user: matt <matt%NetBSD.org@localhost>
date: Mon Jul 11 16:15:35 2016 +0000
description:
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
diffstat:
sys/arch/mips/cavium/dev/if_cnmac.c | 37 +-
sys/arch/mips/cavium/dev/octeon_dwctwo.c | 8 +-
sys/arch/mips/cavium/dev/octeon_powvar.h | 17 +-
sys/arch/mips/cavium/octeon_cpunode.c | 27 +-
sys/arch/mips/cavium/octeon_dma.c | 9 +-
sys/arch/mips/cavium/octeon_intr.c | 84 +-
sys/arch/mips/cavium/octeonvar.h | 8 +-
sys/arch/mips/conf/files.mips | 19 +-
sys/arch/mips/include/asm.h | 23 +-
sys/arch/mips/include/bus_space_defs.h | 18 +-
sys/arch/mips/include/cache.h | 76 +-
sys/arch/mips/include/cache_ls2.h | 16 +-
sys/arch/mips/include/cache_mipsNN.h | 32 +-
sys/arch/mips/include/cache_octeon.h | 8 +-
sys/arch/mips/include/cache_r10k.h | 16 +-
sys/arch/mips/include/cache_r3k.h | 12 +-
sys/arch/mips/include/cache_r4k.h | 536 +-
sys/arch/mips/include/cache_r5900.h | 10 +-
sys/arch/mips/include/cache_r5k.h | 40 +-
sys/arch/mips/include/cache_tx39.h | 22 +-
sys/arch/mips/include/cpu.h | 440 +---
sys/arch/mips/include/cpu_counter.h | 23 +-
sys/arch/mips/include/cpuregs.h | 6 +-
sys/arch/mips/include/ecoff_machdep.h | 4 +-
sys/arch/mips/include/locore.h | 683 +++-
sys/arch/mips/include/mips3_pte.h | 34 +-
sys/arch/mips/include/mipsNN.h | 239 +-
sys/arch/mips/include/mips_param.h | 48 +-
sys/arch/mips/include/pmap.h | 374 +-
sys/arch/mips/include/pte.h | 226 +-
sys/arch/mips/include/types.h | 4 +-
sys/arch/mips/include/vmparam.h | 9 +-
sys/arch/mips/mips/bus_space_alignstride_chipdep.c | 369 +-
sys/arch/mips/mips/cache.c | 504 ++-
sys/arch/mips/mips/cache_ls2.c | 18 +-
sys/arch/mips/mips/cache_mipsNN.c | 527 +---
sys/arch/mips/mips/cache_octeon.c | 62 +-
sys/arch/mips/mips/cache_r10k.c | 16 +-
sys/arch/mips/mips/cache_r3k.c | 10 +-
sys/arch/mips/mips/cache_r4k.c | 38 +-
sys/arch/mips/mips/cache_r4k_pcache128.S | 37 +
sys/arch/mips/mips/cache_r4k_pcache16.S | 37 +
sys/arch/mips/mips/cache_r4k_pcache32.S | 37 +
sys/arch/mips/mips/cache_r4k_pcache64.S | 37 +
sys/arch/mips/mips/cache_r4k_scache128.S | 36 +
sys/arch/mips/mips/cache_r4k_scache16.S | 36 +
sys/arch/mips/mips/cache_r4k_scache32.S | 36 +
sys/arch/mips/mips/cache_r4k_scache64.S | 36 +
sys/arch/mips/mips/cache_r4k_subr.S | 216 +
sys/arch/mips/mips/cache_r5k.c | 507 +--
sys/arch/mips/mips/cache_tx39.c | 22 +-
sys/arch/mips/mips/cpu_subr.c | 53 +-
sys/arch/mips/mips/db_interface.c | 21 +-
sys/arch/mips/mips/genassym.cf | 51 +-
sys/arch/mips/mips/kgdb_machdep.c | 22 +-
sys/arch/mips/mips/lock_stubs_llsc.S | 6 +-
sys/arch/mips/mips/lock_stubs_ras.S | 4 +-
sys/arch/mips/mips/locore.S | 16 +-
sys/arch/mips/mips/locore_mips1.S | 278 +-
sys/arch/mips/mips/locore_mips3.S | 91 +-
sys/arch/mips/mips/locore_octeon.S | 8 +-
sys/arch/mips/mips/mipsX_subr.S | 910 +++--
sys/arch/mips/mips/mips_fixup.c | 120 +-
sys/arch/mips/mips/mips_machdep.c | 30 +-
sys/arch/mips/mips/pmap.c | 2768 --------------------
sys/arch/mips/mips/pmap_machdep.c | 1017 +++++++
sys/arch/mips/mips/pmap_tlb.c | 8 +-
sys/arch/mips/mips/trap.c | 161 +-
sys/arch/mips/mips/vm_machdep.c | 53 +-
sys/arch/mips/mips/wired_map.c | 12 +-
70 files changed, 5126 insertions(+), 6192 deletions(-)
diffs (truncated from 15485 to 300 lines):
diff -r c3fe7d8ad06c -r 7564da98c692 sys/arch/mips/cavium/dev/if_cnmac.c
--- a/sys/arch/mips/cavium/dev/if_cnmac.c Mon Jul 11 16:13:28 2016 +0000
+++ b/sys/arch/mips/cavium/dev/if_cnmac.c Mon Jul 11 16:15:35 2016 +0000
@@ -1,8 +1,8 @@
-/* $NetBSD: if_cnmac.c,v 1.3 2016/06/10 13:27:12 ozaki-r Exp $ */
+/* $NetBSD: if_cnmac.c,v 1.4 2016/07/11 16:15:35 matt Exp $ */
#include <sys/cdefs.h>
#if 0
-__KERNEL_RCSID(0, "$NetBSD: if_cnmac.c,v 1.3 2016/06/10 13:27:12 ozaki-r Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_cnmac.c,v 1.4 2016/07/11 16:15:35 matt Exp $");
#endif
#include "opt_octeon.h"
@@ -946,11 +946,19 @@
*/
pko_cmd_w0 = octeon_eth_send_makecmd_w0(sc->sc_fau_done.fd_regno,
0, m->m_pkthdr.len, segs);
- pko_cmd_w1 = octeon_eth_send_makecmd_w1(
- (segs == 1) ? m->m_pkthdr.len : segs,
- (segs == 1) ?
- kvtophys((vaddr_t)m->m_data) :
- MIPS_XKPHYS_TO_PHYS(gbuf));
+ if (segs == 1) {
+ pko_cmd_w1 = octeon_eth_send_makecmd_w1(
+ m->m_pkthdr.len, kvtophys((vaddr_t)m->m_data));
+ } else {
+#ifdef __mips_n32
+ KASSERT(MIPS_KSEG0_P(gbuf));
+ pko_cmd_w1 = octeon_eth_send_makecmd_w1(segs,
+ MIPS_KSEG0_TO_PHYS(gbuf));
+#else
+ pko_cmd_w1 = octeon_eth_send_makecmd_w1(segs,
+ MIPS_XKPHYS_TO_PHYS(gbuf));
+#endif
+ }
*rpko_cmd_w0 = pko_cmd_w0;
*rpko_cmd_w1 = pko_cmd_w1;
@@ -966,7 +974,12 @@
uint64_t *cmdptr;
int result = 0;
+#ifdef __mips_n32
+ KASSERT((sc->sc_cmdptr.cmdptr & ~MIPS_PHYS_MASK) == 0);
+ cmdptr = (uint64_t *)MIPS_PHYS_TO_KSEG0(sc->sc_cmdptr.cmdptr);
+#else
cmdptr = (uint64_t *)MIPS_PHYS_TO_XKPHYS_CACHED(sc->sc_cmdptr.cmdptr);
+#endif
cmdptr += sc->sc_cmdptr.cmdptr_idx;
OCTEON_ETH_KASSERT(cmdptr != NULL);
@@ -1047,7 +1060,12 @@
}
OCTEON_EVCNT_INC(sc, txbufgbget);
+#ifdef __mips_n32
+ KASSERT((gaddr & ~MIPS_PHYS_MASK) == 0);
+ gbuf = (uint64_t *)(uintptr_t)MIPS_PHYS_TO_KSEG0(gaddr);
+#else
gbuf = (uint64_t *)(uintptr_t)MIPS_PHYS_TO_XKPHYS_CACHED(gaddr);
+#endif
OCTEON_ETH_KASSERT(gbuf != NULL);
@@ -1312,7 +1330,12 @@
vaddr_t addr;
vaddr_t start_buffer;
+#ifdef __mips_n32
+ KASSERT((word3 & ~MIPS_PHYS_MASK) == 0);
+ addr = MIPS_PHYS_TO_KSEG0(word3 & PIP_WQE_WORD3_ADDR);
+#else
addr = MIPS_PHYS_TO_XKPHYS_CACHED(word3 & PIP_WQE_WORD3_ADDR);
+#endif
start_buffer = addr & ~(2048 - 1);
ext_free = octeon_eth_buf_ext_free_ext;
diff -r c3fe7d8ad06c -r 7564da98c692 sys/arch/mips/cavium/dev/octeon_dwctwo.c
--- a/sys/arch/mips/cavium/dev/octeon_dwctwo.c Mon Jul 11 16:13:28 2016 +0000
+++ b/sys/arch/mips/cavium/dev/octeon_dwctwo.c Mon Jul 11 16:15:35 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: octeon_dwctwo.c,v 1.7 2016/04/26 09:24:57 skrll Exp $ */
+/* $NetBSD: octeon_dwctwo.c,v 1.8 2016/07/11 16:15:35 matt Exp $ */
/*
* Copyright (c) 2015 Masao Uebayashi <uebayasi%tombiinc.com@localhost>
@@ -43,7 +43,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: octeon_dwctwo.c,v 1.7 2016/04/26 09:24:57 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: octeon_dwctwo.c,v 1.8 2016/07/11 16:15:35 matt Exp $");
#include "opt_octeon.h"
#include "opt_usb.h"
@@ -321,7 +321,7 @@
{
/* dwc2 uses little-endian addressing */
- return mips3_lw_a64((h + off) ^ 4);
+ return mips_lw((h + off) ^ 4);
}
static void
@@ -330,7 +330,7 @@
{
/* dwc2 uses little-endian addressing */
- mips3_sw_a64((h + off) ^ 4, val);
+ mips_sw((h + off) ^ 4, val);
}
int
diff -r c3fe7d8ad06c -r 7564da98c692 sys/arch/mips/cavium/dev/octeon_powvar.h
--- a/sys/arch/mips/cavium/dev/octeon_powvar.h Mon Jul 11 16:13:28 2016 +0000
+++ b/sys/arch/mips/cavium/dev/octeon_powvar.h Mon Jul 11 16:15:35 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: octeon_powvar.h,v 1.1 2015/04/29 08:32:01 hikaru Exp $ */
+/* $NetBSD: octeon_powvar.h,v 1.2 2016/07/11 16:15:35 matt Exp $ */
/*
* Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -457,10 +457,17 @@
OCTEON_SYNCIOBDMA;
result = octeon_cvmseg_read_8(scraddr);
- return (result & POW_IOBDMA_GET_WORK_RESULT_NO_WORK) ?
- NULL :
- (uint64_t *)MIPS_PHYS_TO_XKPHYS_CACHED(
- result & POW_IOBDMA_GET_WORK_RESULT_ADDR);
+ paddr_t addr = result & POW_IOBDMA_GET_WORK_RESULT_ADDR;
+
+ if (result & POW_IOBDMA_GET_WORK_RESULT_NO_WORK)
+ return NULL;
+#ifdef __mips_n32
+ KASSERT(addr < MIPS_PHYS_MASK);
+ //if (addr < MIPS_PHYS_MASK)
+ return (uint64_t *)MIPS_PHYS_TO_KSEG0(addr);
+#else
+ return (uint64_t *)MIPS_PHYS_TO_XKPHYS_CACHED(addr);
+#endif
}
static inline void
diff -r c3fe7d8ad06c -r 7564da98c692 sys/arch/mips/cavium/octeon_cpunode.c
--- a/sys/arch/mips/cavium/octeon_cpunode.c Mon Jul 11 16:13:28 2016 +0000
+++ b/sys/arch/mips/cavium/octeon_cpunode.c Mon Jul 11 16:15:35 2016 +0000
@@ -87,6 +87,9 @@
{
struct cpunode_attach_args * const cnaa = aux;
+ if (pnp)
+ aprint_normal("%s", pnp);
+
if (cnaa->cnaa_cpunum != CPUNODECF_CORE_DEFAULT)
aprint_normal(" core %d", cnaa->cnaa_cpunum);
@@ -162,7 +165,7 @@
{
struct cpu_info * const ci = arg;
- atomic_or_64(&curcpu()->ci_flags, CPUF_PRESENT);
+ atomic_or_ulong(&curcpu()->ci_flags, CPUF_PRESENT);
KASSERT(MIPS_KSEG0_P(load_addr));
#ifdef MULTIPROCESSOR
@@ -248,9 +251,9 @@
void **nmi_vector = (void *)MIPS_PHYS_TO_KSEG0(0x800 + 32*ci->ci_cpuid);
*nmi_vector = octeon_reset_vector;
- struct vm_page * const pg = mips_pmap_alloc_poolpage(UVM_PGA_ZERO);
+ struct vm_page * const pg = PMAP_ALLOC_POOLPAGE(UVM_PGA_ZERO);
KASSERT(pg != NULL);
- const vaddr_t kva = mips_pmap_map_poolpage(VM_PAGE_TO_PHYS(pg));
+ const vaddr_t kva = PMAP_MAP_POOLPAGE(VM_PAGE_TO_PHYS(pg));
KASSERT(kva != 0);
ci->ci_nmi_stack = (void *)(kva + PAGE_SIZE - sizeof(struct kernframe));
#endif
@@ -310,10 +313,10 @@
}
if (!kcpuset_isset(cpus_hatched, cpunum)) {
#ifdef DDB
- aprint_verbose_dev(self, "hatch failed ci=%p flags=%#"PRIx64"\n", ci, ci->ci_flags);
+ aprint_verbose_dev(self, "hatch failed ci=%p flags=%#lx\n", ci, ci->ci_flags);
cpu_Debugger();
#endif
- panic("%s failed to hatch: ci=%p flags=%#"PRIx64,
+ panic("%s failed to hatch: ci=%p flags=%#lx",
cpu_name(ci), ci, ci->ci_flags);
}
#else
@@ -351,14 +354,14 @@
struct cpu_info *ci;
for (CPU_INFO_FOREACH(cii, ci)) {
struct cpu_softc * const cpu = ci->ci_softc;
- uint64_t wdog = mips64_ld_a64(cpu->cpu_wdog);
+ uint64_t wdog = mips3_ld(cpu->cpu_wdog);
wdog &= ~CIU_WDOGX_MODE;
- mips64_sd_a64(cpu->cpu_pp_poke, wdog);
+ mips3_sd(cpu->cpu_pp_poke, wdog);
aprint_verbose_dev(sc->sc_dev,
"%s: disable wdog=%#"PRIx64"\n",
cpu_name(ci), wdog);
- mips64_sd_a64(cpu->cpu_wdog, wdog);
- mips64_sd_a64(cpu->cpu_pp_poke, wdog);
+ mips3_sd(cpu->cpu_wdog, wdog);
+ mips3_sd(cpu->cpu_pp_poke, wdog);
}
sc->sc_wdog_armed = false;
}
@@ -382,14 +385,14 @@
CPU_INFO_ITERATOR cii;
for (CPU_INFO_FOREACH(cii, ci)) {
struct cpu_softc * const cpu = ci->ci_softc;
- uint64_t wdog = mips64_ld_a64(cpu->cpu_wdog);
+ uint64_t wdog = mips3_ld(cpu->cpu_wdog);
wdog &= ~(CIU_WDOGX_MODE|CIU_WDOGX_LEN);
wdog |= __SHIFTIN(3, CIU_WDOGX_MODE);
wdog |= __SHIFTIN(wdog_len >> 16, CIU_WDOGX_LEN);
aprint_verbose_dev(sc->sc_dev,
"%s: enable wdog=%#"PRIx64" (%#"PRIx64")\n",
cpu_name(ci), wdog, wdog_len);
- mips64_sd_a64(cpu->cpu_wdog, wdog);
+ mips3_sd(cpu->cpu_wdog, wdog);
}
sc->sc_wdog_armed = true;
kpreempt_enable();
@@ -401,7 +404,7 @@
wdog_cpunode_poke(void *arg)
{
struct cpu_softc *cpu = arg;
- mips64_sd_a64(cpu->cpu_pp_poke, 0);
+ mips3_sd(cpu->cpu_pp_poke, 0);
}
static int
diff -r c3fe7d8ad06c -r 7564da98c692 sys/arch/mips/cavium/octeon_dma.c
--- a/sys/arch/mips/cavium/octeon_dma.c Mon Jul 11 16:13:28 2016 +0000
+++ b/sys/arch/mips/cavium/octeon_dma.c Mon Jul 11 16:15:35 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: octeon_dma.c,v 1.1 2015/04/29 08:32:00 hikaru Exp $ */
+/* $NetBSD: octeon_dma.c,v 1.2 2016/07/11 16:15:35 matt Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: octeon_dma.c,v 1.1 2015/04/29 08:32:00 hikaru Exp $");
+__KERNEL_RCSID(0, "$NetBSD: octeon_dma.c,v 1.2 2016/07/11 16:15:35 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -71,4 +71,9 @@
/* XXX struct copy */
mcp->mc_bootbus_dmat = mcp->mc_iobus_dmat;
mcp->mc_core1_dmat = mcp->mc_iobus_dmat;
+ mcp->mc_fpa_dmat = mcp->mc_iobus_dmat;
+
+#ifdef __mips_n32
+ mcp->mc_fpa_dmat._bounce_alloc_hi = round_page(MIPS_PHYS_MASK);
+#endif
}
diff -r c3fe7d8ad06c -r 7564da98c692 sys/arch/mips/cavium/octeon_intr.c
--- a/sys/arch/mips/cavium/octeon_intr.c Mon Jul 11 16:13:28 2016 +0000
+++ b/sys/arch/mips/cavium/octeon_intr.c Mon Jul 11 16:15:35 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: octeon_intr.c,v 1.4 2015/06/06 20:52:16 matt Exp $ */
+/* $NetBSD: octeon_intr.c,v 1.5 2016/07/11 16:15:35 matt Exp $ */
/*
* Copyright 2001, 2002 Wasabi Systems, Inc.
* All rights reserved.
@@ -43,7 +43,7 @@
#define __INTR_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: octeon_intr.c,v 1.4 2015/06/06 20:52:16 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: octeon_intr.c,v 1.5 2016/07/11 16:15:35 matt Exp $");
#include <sys/param.h>
#include <sys/cpu.h>
@@ -246,25 +246,25 @@
const uint64_t sum_mbox_lo = __BIT(_CIU_INT_MBOX_15_0_SHIFT);
const uint64_t sum_mbox_hi = __BIT(_CIU_INT_MBOX_31_16_SHIFT);
- mips64_sd_a64(mbox_clr0, ~0ULL);
- mips64_sd_a64(mbox_clr1, ~0ULL);
+ mips3_sd(mbox_clr0, ~0ULL);
+ mips3_sd(mbox_clr1, ~0ULL);
- uint32_t mbox0 = mips64_ld_a64(mbox_set0);
- uint32_t mbox1 = mips64_ld_a64(mbox_set1);
+ uint32_t mbox0 = mips3_ld(mbox_set0);
+ uint32_t mbox1 = mips3_ld(mbox_set1);
KDASSERTMSG(mbox0 == 0, "mbox0 %#x mbox1 %#x", mbox0, mbox1);
KDASSERTMSG(mbox1 == 0, "mbox0 %#x mbox1 %#x", mbox0, mbox1);
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