[src/trunk]: src/sys/rump/kern/lib/libsljit/arch/mips Cast register_t to uint...

[alnsn <alnsn%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/00a71cc82f40
branches:  trunk
changeset: 838540:00a71cc82f40
user:      alnsn <alnsn%NetBSD.org@localhost>
date:      Tue Jan 22 01:25:53 2019 +0000

description:
Cast register_t to uintptr_t before casting to void *.

Not sure what's going on here but evbmips64-el build fails
without this cast.

diffstat:

 sys/rump/kern/lib/libsljit/arch/mips/cache.c |  6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diffs (25 lines):

diff -r ad106b2adcea -r 00a71cc82f40 sys/rump/kern/lib/libsljit/arch/mips/cache.c
--- a/sys/rump/kern/lib/libsljit/arch/mips/cache.c      Tue Jan 22 00:36:02 2019 +0000
+++ b/sys/rump/kern/lib/libsljit/arch/mips/cache.c      Tue Jan 22 01:25:53 2019 +0000
@@ -1,4 +1,4 @@
-/*      $NetBSD: cache.c,v 1.2 2019/01/22 00:36:02 alnsn Exp $ */
+/*      $NetBSD: cache.c,v 1.3 2019/01/22 01:25:53 alnsn Exp $ */
 
 /*-
  * Copyright (c) 2014 Alexander Nasonov.
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.2 2019/01/22 00:36:02 alnsn Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.3 2019/01/22 01:25:53 alnsn Exp $");
 
 /*
  * Barebone implementation of mips cache routines for rump.
@@ -48,5 +48,5 @@
 icache_sync_range(register_t va, vsize_t sz)
 {
 
-       (void)rumpcomp_sync_icache((void *)va, (uint64_t)sz);
+       (void)rumpcomp_sync_icache((void *)(uintptr_t)va, (uint64_t)sz);
 }