[src/trunk]: src/sys/arch/arm/cortex skip a TLBIALL on Cortex-A5 that stops m...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/981b06500cd5
branches:  trunk
changeset: 806525:981b06500cd5
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Fri Feb 27 18:52:20 2015 +0000

description:
skip a TLBIALL on Cortex-A5 that stops my odroid-c1 from booting, ok matt

diffstat:

 sys/arch/arm/cortex/a9_mpsubr.S |  4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diffs (21 lines):

diff -r 84d86e3abd63 -r 981b06500cd5 sys/arch/arm/cortex/a9_mpsubr.S
--- a/sys/arch/arm/cortex/a9_mpsubr.S   Fri Feb 27 18:43:28 2015 +0000
+++ b/sys/arch/arm/cortex/a9_mpsubr.S   Fri Feb 27 18:52:20 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: a9_mpsubr.S,v 1.28 2015/02/07 17:14:32 jmcneill Exp $  */
+/*     $NetBSD: a9_mpsubr.S,v 1.29 2015/02/27 18:52:20 jmcneill Exp $  */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -207,9 +207,11 @@
 #endif
        mcr     p15, 0, r1, c2, c0, 2   // TTBCR write
 
+#if !defined(CPU_CORTEXA5)
        XPUTC(#73)
        mov     r1, #0
        mcr     p15, 0, r1, c8, c7, 0   // TLBIALL (just this core)
+#endif
 
        XPUTC(#74)
        mov     r1, #0                  // get KERNEL_PID