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[src/trunk]: src/sys/arch Switch Tegra over to fdt based clocks and reset con...



details:   https://anonhg.NetBSD.org/src/rev/642e6060bc01
branches:  trunk
changeset: 812595:642e6060bc01
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Tue Dec 22 22:10:36 2015 +0000

description:
Switch Tegra over to fdt based clocks and reset controls.

diffstat:

 sys/arch/arm/nvidia/files.tegra       |     8 +-
 sys/arch/arm/nvidia/soc_tegra124.c    |    41 +-
 sys/arch/arm/nvidia/tegra124_car.c    |  1382 +++++++++++++++++++++++++++++++++
 sys/arch/arm/nvidia/tegra124_carreg.h |   509 ++++++++++++
 sys/arch/arm/nvidia/tegra_ahcisata.c  |   126 ++-
 sys/arch/arm/nvidia/tegra_car.c       |   930 ----------------------
 sys/arch/arm/nvidia/tegra_carreg.h    |   499 -----------
 sys/arch/arm/nvidia/tegra_cec.c       |    24 +-
 sys/arch/arm/nvidia/tegra_clock.h     |    93 ++
 sys/arch/arm/nvidia/tegra_com.c       |    38 +-
 sys/arch/arm/nvidia/tegra_cpufreq.c   |    19 +-
 sys/arch/arm/nvidia/tegra_drm.c       |    59 +-
 sys/arch/arm/nvidia/tegra_drm.h       |    17 +-
 sys/arch/arm/nvidia/tegra_drm_mode.c  |   108 ++-
 sys/arch/arm/nvidia/tegra_ehci.c      |    26 +-
 sys/arch/arm/nvidia/tegra_fdt.c       |     7 +-
 sys/arch/arm/nvidia/tegra_fuse.c      |    35 +-
 sys/arch/arm/nvidia/tegra_hdaudio.c   |   129 ++-
 sys/arch/arm/nvidia/tegra_i2c.c       |    61 +-
 sys/arch/arm/nvidia/tegra_nouveau.c   |    46 +-
 sys/arch/arm/nvidia/tegra_sdhc.c      |    55 +-
 sys/arch/arm/nvidia/tegra_soc.c       |     6 +-
 sys/arch/arm/nvidia/tegra_soctherm.c  |    91 ++-
 sys/arch/arm/nvidia/tegra_timer.c     |    66 +-
 sys/arch/arm/nvidia/tegra_timerreg.h  |     5 +-
 sys/arch/arm/nvidia/tegra_usbphy.c    |    93 +-
 sys/arch/evbarm/conf/TEGRA            |     4 +-
 sys/arch/evbarm/conf/std.tegra        |     3 +-
 sys/arch/evbarm/tegra/tegra_machdep.c |    10 +-
 29 files changed, 2810 insertions(+), 1680 deletions(-)

diffs (truncated from 5517 to 300 lines):

diff -r 3ec4c67be16e -r 642e6060bc01 sys/arch/arm/nvidia/files.tegra
--- a/sys/arch/arm/nvidia/files.tegra   Tue Dec 22 21:42:11 2015 +0000
+++ b/sys/arch/arm/nvidia/files.tegra   Tue Dec 22 22:10:36 2015 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.tegra,v 1.27 2015/12/13 22:55:05 jmcneill Exp $
+#      $NetBSD: files.tegra,v 1.28 2015/12/22 22:10:36 jmcneill Exp $
 #
 # Configuration info for NVIDIA Tegra ARM Peripherals
 #
@@ -43,9 +43,9 @@
 file   arch/arm/nvidia/tegra_fuse.c            tegra_fuse
 
 # Clock and Reset controller
-device tegracar
-attach tegracar at fdt with tegra_car
-file   arch/arm/nvidia/tegra_car.c             tegra_car
+device tegra124car: clk
+attach tegra124car at fdt with tegra124_car
+file   arch/arm/nvidia/tegra124_car.c          tegra124_car
 
 # GPIO controller
 device tegragpio: gpiobus
diff -r 3ec4c67be16e -r 642e6060bc01 sys/arch/arm/nvidia/soc_tegra124.c
--- a/sys/arch/arm/nvidia/soc_tegra124.c        Tue Dec 22 21:42:11 2015 +0000
+++ b/sys/arch/arm/nvidia/soc_tegra124.c        Tue Dec 22 22:10:36 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: soc_tegra124.c,v 1.11 2015/12/01 22:08:13 jmcneill Exp $ */
+/* $NetBSD: soc_tegra124.c,v 1.12 2015/12/22 22:10:36 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -30,7 +30,7 @@
 #include "opt_multiprocessor.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: soc_tegra124.c,v 1.11 2015/12/01 22:08:13 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: soc_tegra124.c,v 1.12 2015/12/22 22:10:36 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -39,6 +39,10 @@
 
 #include <uvm/uvm_extern.h>
 
+#include <dev/clk/clk.h>
+#include <dev/i2c/i2cvar.h>
+#include <dev/fdt/fdtvar.h>
+
 #include <arm/cpufunc.h>
 
 #include <arm/nvidia/tegra_reg.h>
@@ -107,19 +111,42 @@
        .gpu_speedo_id = 0
 };
 
+static struct clk *tegra124_clk_pllx = NULL;
+
 void
 tegra124_cpuinit(void)
 {
-       tegra_car_periph_i2c_enable(4, 20400000);
+       const int node = OF_finddevice("/i2c@0,7000d000");
+       if (node == -1) {
+               aprint_error("cpufreq: ERROR: couldn't find i2c@0,7000d000\n");
+               return;
+       }
+       i2c_tag_t ic = fdtbus_get_i2c_tag(node);
 
        /* Set VDD_CPU voltage to 1.4V */
        const u_int target_mv = 1400;
        const u_int sd0_vsel = (target_mv - 600) / 10;
-       tegra_i2c_dvc_write(0x40, (sd0_vsel << 8) | 00, 2);
+       uint8_t data[2] = { 0x00, sd0_vsel };
+
+       iic_acquire_bus(ic, I2C_F_POLL);
+       const int error = iic_exec(ic, I2C_OP_WRITE_WITH_STOP, 0x40,
+           NULL, 0, data, sizeof(data), I2C_F_POLL);
+       iic_release_bus(ic, I2C_F_POLL);
+       if (error) {
+               aprint_error("cpufreq: ERROR: couldn't set VDD_CPU: %d\n",
+                   error);
+               return;
+       }
        delay(10000);
 
        tegra124_speedo_init();
 
+       tegra124_clk_pllx = clk_get("pll_x");
+       if (tegra124_clk_pllx == NULL) {
+               aprint_error("cpufreq: ERROR: couldn't find pll_x\n");
+               return;
+       }
+
        tegra_cpufreq_register(&tegra124_cpufreq_func);
 }
 
@@ -206,15 +233,13 @@
        if (r == NULL)
                return EINVAL;
 
-       tegra_car_pllx_set_rate(r->divm, r->divn, r->divp);
-
-       return 0;
+       return clk_set_rate(tegra124_clk_pllx, r->rate * 1000000);
 }
 
 static u_int
 tegra124_cpufreq_get_rate(void)
 {
-       return tegra_car_pllx_rate() / 1000000;
+       return clk_get_rate(tegra124_clk_pllx) / 1000000;
 }
 
 static size_t
diff -r 3ec4c67be16e -r 642e6060bc01 sys/arch/arm/nvidia/tegra124_car.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/nvidia/tegra124_car.c        Tue Dec 22 22:10:36 2015 +0000
@@ -0,0 +1,1382 @@
+/* $NetBSD: tegra124_car.c,v 1.1 2015/12/22 22:10:36 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: tegra124_car.c,v 1.1 2015/12/22 22:10:36 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/rndpool.h>
+#include <sys/rndsource.h>
+#include <sys/atomic.h>
+#include <sys/kmem.h>
+
+#include <dev/clk/clk_backend.h>
+
+#include <arm/nvidia/tegra_reg.h>
+#include <arm/nvidia/tegra124_carreg.h>
+#include <arm/nvidia/tegra_clock.h>
+#include <arm/nvidia/tegra_pmcreg.h>
+#include <arm/nvidia/tegra_var.h>
+
+#include <dev/fdt/fdtvar.h>
+
+static int     tegra124_car_match(device_t, cfdata_t, void *);
+static void    tegra124_car_attach(device_t, device_t, void *);
+
+static struct clk *tegra124_car_clock_decode(device_t, const void *, size_t);
+
+static const struct fdtbus_clock_controller_func tegra124_car_fdtclock_funcs = {
+       .decode = tegra124_car_clock_decode
+};
+
+/* DT clock ID to clock name mappings */
+static struct tegra124_car_clock_id {
+       u_int           id;
+       const char      *name;
+} tegra124_car_clock_ids[] = {
+       { 3, "ispb" },
+       { 4, "rtc" },
+       { 5, "timer" },
+       { 6, "uarta" },
+       { 9, "sdmmc2" },
+       { 11, "i2s1" },
+       { 12, "i2c1" },
+       { 14, "sdmmc1" },
+       { 15, "sdmmc4" },
+       { 17, "pwm" },
+       { 18, "i2s2" },
+       { 22, "usbd" },
+       { 23, "isp" },
+       { 26, "disp2" },
+       { 27, "disp1" },
+       { 28, "host1x" },
+       { 29, "vcp" },
+       { 30, "i2s0" },
+       { 32, "mc" },
+       { 34, "apbdma" },
+       { 36, "kbc" },
+       { 40, "kfuse" },
+       { 41, "sbc1" },
+       { 42, "nor" },
+       { 44, "sbc2" },
+       { 46, "sbc3" },
+       { 47, "i2c5" },
+       { 48, "dsia" },
+       { 50, "mipi" },
+       { 51, "hdmi" },
+       { 52, "csi" },
+       { 54, "i2c2" },
+       { 55, "uartc" },
+       { 56, "mipi_cal" },
+       { 57, "emc" },
+       { 58, "usb2" },
+       { 59, "usb3" },
+       { 61, "vde" },
+       { 62, "bsea" },
+       { 63, "bsev" },
+       { 65, "uartd" },
+       { 67, "i2c3" },
+       { 68, "sbc4" },
+       { 69, "sdmmc3" },
+       { 70, "pcie" },
+       { 71, "owr" },
+       { 72, "afi" },
+       { 73, "csite" },
+       { 76, "la" },
+       { 77, "trace" },
+       { 78, "soc_therm" },
+       { 79, "dtv" },
+       { 81, "i2cslow" },
+       { 82, "dsib" },
+       { 83, "tsec" },
+       { 89, "xusb_host" },
+       { 91, "msenc" },
+       { 92, "csus" },
+       { 99, "mselect" },
+       { 100, "tsensor" },
+       { 101, "i2s3" },
+       { 102, "i2s4" },
+       { 103, "i2c4" },
+       { 104, "sbc5" },
+       { 105, "sbc6" },
+       { 106, "d_audio" },
+       { 107, "apbif" },
+       { 108, "dam0" },
+       { 109, "dam1" },
+       { 110, "dam2" },
+       { 111, "hda2codec_2x" },
+       { 113, "audio0_2x" },
+       { 114, "audio1_2x" },
+       { 115, "audio2_2x" },
+       { 116, "audio3_2x" },
+       { 117, "audio4_2x" },
+       { 118, "spdif_2x" },
+       { 119, "actmon" },
+       { 120, "extern1" },
+       { 121, "extern2" },
+       { 122, "extern3" },
+       { 123, "sata_oob" },
+       { 124, "sata" },
+       { 125, "hda" },
+       { 127, "se" },
+       { 128, "hda2hdmi" },
+       { 129, "sata_cold" },
+       { 144, "cilab" },
+       { 145, "cilcd" },
+       { 146, "cile" },
+       { 147, "dsialp" },
+       { 148, "dsiblp" },
+       { 149, "entropy" },
+       { 150, "dds" },
+       { 152, "dp2" },
+       { 153, "amx" },
+       { 154, "adx" },
+       { 156, "xusb_ss" },
+       { 166, "i2c6" },
+       { 171, "vim2_clk" },
+       { 176, "hdmi_audio" },
+       { 177, "clk72mhz" },
+       { 178, "vic03" },
+       { 180, "adx1" },
+       { 181, "dpaux" },
+       { 182, "sor0" },
+       { 184, "gpu" },
+       { 185, "amx1" },
+       { 192, "uartb" },
+       { 193, "vfir" },
+       { 194, "spdif_in" },
+       { 195, "spdif_out" },
+       { 196, "vi" },
+       { 197, "vi_sensor" },
+       { 198, "fuse" },
+       { 199, "fuse_burn" },



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