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[src/netbsd-7]: src/sys/arch Pull up following revision(s) (requested by mart...
details: https://anonhg.NetBSD.org/src/rev/018be8a10fda
branches: netbsd-7
changeset: 799491:018be8a10fda
user: snj <snj%NetBSD.org@localhost>
date: Mon Jul 20 06:12:23 2015 +0000
description:
Pull up following revision(s) (requested by martin in ticket #842):
sys/arch/sparc/stand/ofwboot/loadfile_machdep.c: revision 1.14
sys/arch/sparc/stand/ofwboot/version: revision 1.21
sys/arch/sparc64/include/cpu.h: revision 1.115
sys/arch/sparc64/sparc64/autoconf.c: revision 1.203
sys/arch/sparc64/sparc64/mp_subr.S: revision 1.9 via patch
sys/arch/sparc64/sparc64/pmap.c: revisions 1.295, 1.295 via patch
Fix available length calculation in kvamap_extract when reusing existing
mappings.
--
Bump version now that we can load kernels with sizeof(.data)+sizeof(.bss)> 4 MB
--
Do not hardcode the assumption that .data and .bss fit together in a single
4 MB page. This allows booting kernels with options USB_DEBUG again.
--
Slightly optimize the ITLB usage on secondary processors
diffstat:
sys/arch/sparc/stand/ofwboot/loadfile_machdep.c | 6 +-
sys/arch/sparc/stand/ofwboot/version | 3 +-
sys/arch/sparc64/include/cpu.h | 4 +-
sys/arch/sparc64/sparc64/autoconf.c | 13 +++++--
sys/arch/sparc64/sparc64/mp_subr.S | 42 ++++++++++++++++++++----
sys/arch/sparc64/sparc64/pmap.c | 25 ++++++++------
6 files changed, 65 insertions(+), 28 deletions(-)
diffs (283 lines):
diff -r 31eba2e6d6e5 -r 018be8a10fda sys/arch/sparc/stand/ofwboot/loadfile_machdep.c
--- a/sys/arch/sparc/stand/ofwboot/loadfile_machdep.c Mon Jul 20 05:01:58 2015 +0000
+++ b/sys/arch/sparc/stand/ofwboot/loadfile_machdep.c Mon Jul 20 06:12:23 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: loadfile_machdep.c,v 1.13 2014/04/21 18:10:40 palle Exp $ */
+/* $NetBSD: loadfile_machdep.c,v 1.13.2.1 2015/07/20 06:12:23 snj Exp $ */
/*-
* Copyright (c) 2005 The NetBSD Foundation, Inc.
@@ -136,13 +136,13 @@
if (kvamap[i].start == NULL)
break;
if ((kvamap[i].start <= va) && (va < kvamap[i].end)) {
- uint64_t va_len = kvamap[i].end - va + kvamap[i].start;
+ uint64_t va_len = kvamap[i].end - va;
len = (va_len < len) ? len - va_len : 0;
*new_va = kvamap[i].end;
}
}
- return (len);
+ return len;
}
/*
diff -r 31eba2e6d6e5 -r 018be8a10fda sys/arch/sparc/stand/ofwboot/version
--- a/sys/arch/sparc/stand/ofwboot/version Mon Jul 20 05:01:58 2015 +0000
+++ b/sys/arch/sparc/stand/ofwboot/version Mon Jul 20 06:12:23 2015 +0000
@@ -1,4 +1,4 @@
-$NetBSD: version,v 1.20 2013/12/08 14:41:28 palle Exp $
+$NetBSD: version,v 1.20.4.1 2015/07/20 06:12:23 snj Exp $
NOTE ANY CHANGES YOU MAKE TO THE BOOTBLOCKS HERE. The format of this
file is important - make sure the entries are appended on end, last item
@@ -21,3 +21,4 @@
1.15: Properly close the firmware handle before starting the kernel
1.16: Add support to boot with root on cd9660
1.17: Add support for sun4v architecture
+1.18: Fix loading of kernels with huge .bss
diff -r 31eba2e6d6e5 -r 018be8a10fda sys/arch/sparc64/include/cpu.h
--- a/sys/arch/sparc64/include/cpu.h Mon Jul 20 05:01:58 2015 +0000
+++ b/sys/arch/sparc64/include/cpu.h Mon Jul 20 06:12:23 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.111 2014/06/08 17:33:24 palle Exp $ */
+/* $NetBSD: cpu.h,v 1.111.2.1 2015/07/20 06:12:23 snj Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -261,7 +261,7 @@
extern char *mp_tramp_code;
extern u_long mp_tramp_code_len;
-extern u_long mp_tramp_tlb_slots;
+extern u_long mp_tramp_dtlb_slots, mp_tramp_itlb_slots;
extern u_long mp_tramp_func;
extern u_long mp_tramp_ci;
diff -r 31eba2e6d6e5 -r 018be8a10fda sys/arch/sparc64/sparc64/autoconf.c
--- a/sys/arch/sparc64/sparc64/autoconf.c Mon Jul 20 05:01:58 2015 +0000
+++ b/sys/arch/sparc64/sparc64/autoconf.c Mon Jul 20 06:12:23 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: autoconf.c,v 1.198.2.2 2015/03/21 17:32:13 snj Exp $ */
+/* $NetBSD: autoconf.c,v 1.198.2.3 2015/07/20 06:12:23 snj Exp $ */
/*
* Copyright (c) 1996
@@ -48,7 +48,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.198.2.2 2015/03/21 17:32:13 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.198.2.3 2015/07/20 06:12:23 snj Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -158,7 +158,8 @@
* Kernel 4MB mappings.
*/
struct tlb_entry *kernel_tlbs;
-int kernel_tlb_slots;
+int kernel_dtlb_slots;
+int kernel_itlb_slots;
/* Global interrupt mappings for all device types. Match against the OBP
* 'device_type' property.
@@ -354,7 +355,11 @@
boothowto = bi_howto->boothowto;
LOOKUP_BOOTINFO(bi_count, BTINFO_DTLB_SLOTS);
- kernel_tlb_slots = bi_count->count;
+ kernel_dtlb_slots = bi_count->count;
+ kernel_itlb_slots = kernel_dtlb_slots-1;
+ bi_count = lookup_bootinfo(BTINFO_ITLB_SLOTS);
+ if (bi_count)
+ kernel_itlb_slots = bi_count->count;
LOOKUP_BOOTINFO(bi_tlb, BTINFO_DTLB);
kernel_tlbs = &bi_tlb->tlb[0];
diff -r 31eba2e6d6e5 -r 018be8a10fda sys/arch/sparc64/sparc64/mp_subr.S
--- a/sys/arch/sparc64/sparc64/mp_subr.S Mon Jul 20 05:01:58 2015 +0000
+++ b/sys/arch/sparc64/sparc64/mp_subr.S Mon Jul 20 06:12:23 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mp_subr.S,v 1.6 2014/06/08 17:33:24 palle Exp $ */
+/* $NetBSD: mp_subr.S,v 1.6.2.1 2015/07/20 06:12:23 snj Exp $ */
/*
* Copyright (c) 2006-2010 Matthew R. Green
@@ -214,11 +214,12 @@
.text
.align 32
1: rd %pc, %l0
- LDULNG [%l0 + (4f-1b)], %l1
+ LDULNG [%l0 + (3f-1b)], %l1 ! Load itlb slot count
add %l0, (6f-1b), %l2
clr %l3
-2: cmp %l3, %l1
- be CCCR, 3f
+.Litlb_loop:
+ cmp %l3, %l1
+ be CCCR, .Litlb_done
nop
ldx [%l2 + TTE_VPN], %l4
ldx [%l2 + TTE_DATA], %l5
@@ -232,15 +233,40 @@
flush %l4
add %l2, PTE_SIZE, %l2
add %l3, 1, %l3
- ba %xcc, 2b
+ ba %xcc, .Litlb_loop
+ nop
+.Litlb_done:
+ ! continue the same loop (with indices and pointers et al),
+ ! but load a new upper limit and do not push the entries into
+ ! the itlb
+ LDULNG [%l0 + (4f-1b)], %l1 ! Load dtlb slot count
+.Ldtlb_loop:
+ cmp %l3, %l1
+ be CCCR, .Ldtlb_done
nop
-3: LDULNG [%l0 + (5f-1b)], %l1
+ ldx [%l2 + TTE_VPN], %l4
+ ldx [%l2 + TTE_DATA], %l5
+ wr %g0, ASI_DMMU, %asi
+ stxa %l4, [%g0 + TLB_TAG_ACCESS] %asi
+ stxa %l5, [%g0] ASI_DMMU_DATA_IN
+ wr %g0, ASI_IMMU, %asi
+ stxa %l4, [%g0 + TLB_TAG_ACCESS] %asi
+ stxa %l5, [%g0] ASI_IMMU_DATA_IN
+ membar #Sync
+ flush %l4
+ add %l2, PTE_SIZE, %l2
+ add %l3, 1, %l3
+ ba %xcc, .Ldtlb_loop
+ nop
+.Ldtlb_done:
+ LDULNG [%l0 + (5f-1b)], %l1
LDULNG [%l0 + (7f-1b)], %g2 ! Load cpu_info address.
jmpl %l1, %g0
nop
.align PTRSZ
4: ULONG 0x0
+3: ULONG 0x0
5: ULONG 0x0
7: ULONG 0x0
_ALIGN
@@ -256,8 +282,10 @@
POINTER 1b
DATA(mp_tramp_code_len)
ULONG 6b-1b
-DATA(mp_tramp_tlb_slots)
+DATA(mp_tramp_dtlb_slots)
ULONG 4b-1b
+DATA(mp_tramp_itlb_slots)
+ ULONG 3b-1b
DATA(mp_tramp_func)
ULONG 5b-1b
DATA(mp_tramp_ci)
diff -r 31eba2e6d6e5 -r 018be8a10fda sys/arch/sparc64/sparc64/pmap.c
--- a/sys/arch/sparc64/sparc64/pmap.c Mon Jul 20 05:01:58 2015 +0000
+++ b/sys/arch/sparc64/sparc64/pmap.c Mon Jul 20 06:12:23 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.289 2014/07/10 06:24:02 jdc Exp $ */
+/* $NetBSD: pmap.c,v 1.289.2.1 2015/07/20 06:12:23 snj Exp $ */
/*
*
* Copyright (C) 1996-1999 Eduardo Horvath.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.289 2014/07/10 06:24:02 jdc Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.289.2.1 2015/07/20 06:12:23 snj Exp $");
#undef NO_VCACHE /* Don't forget the locked TLB in dostart */
#define HWREF
@@ -213,7 +213,7 @@
* Kernel 4MB pages.
*/
extern struct tlb_entry *kernel_tlbs;
-extern int kernel_tlb_slots;
+extern int kernel_dtlb_slots, kernel_itlb_slots;
static int npgs;
@@ -529,11 +529,12 @@
}
memcpy(v, mp_tramp_code, mp_tramp_code_len);
- *(u_long *)(v + mp_tramp_tlb_slots) = kernel_tlb_slots;
+ *(u_long *)(v + mp_tramp_dtlb_slots) = kernel_dtlb_slots;
+ *(u_long *)(v + mp_tramp_itlb_slots) = kernel_itlb_slots;
*(u_long *)(v + mp_tramp_func) = (u_long)cpu_mp_startup;
*(u_long *)(v + mp_tramp_ci) = (u_long)cpu_args;
tp = (pte_t *)(v + mp_tramp_code_len);
- for (i = 0; i < kernel_tlb_slots; i++) {
+ for (i = 0; i < kernel_dtlb_slots; i++) {
tp[i].tag = kernel_tlbs[i].te_va;
tp[i].data = TSB_DATA(0, /* g */
PGSZ_4M, /* sz */
@@ -545,6 +546,8 @@
1, /* valid */
0 /* ie */);
tp[i].data |= TLB_L | TLB_CV;
+ if (i >= kernel_itlb_slots)
+ tp[i].data |= TLB_W;
DPRINTF(PDB_BOOT1, ("xtlb[%d]: Tag: %" PRIx64 " Data: %"
PRIx64 "\n", i, tp[i].tag, tp[i].data));
}
@@ -566,7 +569,7 @@
int i;
paddr_t paddr = (paddr_t)-1;
- for (i = 0; i < kernel_tlb_slots; i++) {
+ for (i = 0; i < kernel_dtlb_slots; i++) {
if ((va & ~PAGE_MASK_4M) == kernel_tlbs[i].te_va) {
paddr = kernel_tlbs[i].te_pa +
(paddr_t)(va & PAGE_MASK_4M);
@@ -574,7 +577,7 @@
}
}
- if (i == kernel_tlb_slots) {
+ if (i == kernel_dtlb_slots) {
panic("pmap_kextract: Address %p is not from kernel space.\n"
"Data segment is too small?\n", (void*)va);
}
@@ -2345,7 +2348,7 @@
int sz;
sz = ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t));
- sz += kernel_tlb_slots * sizeof(struct cpu_kcore_4mbseg);
+ sz += kernel_dtlb_slots * sizeof(struct cpu_kcore_4mbseg);
sz += phys_installed_size * sizeof(phys_ram_seg_t);
return btodb(sz + DEV_BSIZE - 1);
@@ -2421,7 +2424,7 @@
/* new version of locked segments description */
kcpu->newmagic = SPARC64_KCORE_NEWMAGIC;
- kcpu->num4mbsegs = kernel_tlb_slots;
+ kcpu->num4mbsegs = kernel_dtlb_slots;
kcpu->off4mbsegs = ALIGN(sizeof(cpu_kcore_hdr_t));
/* description of per-cpu mappings */
@@ -2433,7 +2436,7 @@
/* Now the memsegs */
kcpu->nmemseg = phys_installed_size;
kcpu->memsegoffset = kcpu->off4mbsegs
- + kernel_tlb_slots * sizeof(struct cpu_kcore_4mbseg);
+ + kernel_dtlb_slots * sizeof(struct cpu_kcore_4mbseg);
/* Now we need to point this at our kernel pmap. */
kcpu->nsegmap = STSZ;
@@ -2443,7 +2446,7 @@
bp = (int *)((long)kcpu + ALIGN(sizeof(cpu_kcore_hdr_t)));
/* write locked kernel 4MB TLBs */
- for (i = 0; i < kernel_tlb_slots; i++) {
+ for (i = 0; i < kernel_dtlb_slots; i++) {
ktlb.va = kernel_tlbs[i].te_va;
ktlb.pa = kernel_tlbs[i].te_pa;
EXPEDITE(&ktlb, sizeof(ktlb));
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