Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/arm/marvell Add support for mvsoc-based Armada XP p...
details: https://anonhg.NetBSD.org/src/rev/87cef0640f45
branches: trunk
changeset: 787020:87cef0640f45
user: rkujawa <rkujawa%NetBSD.org@localhost>
date: Wed May 29 20:47:14 2013 +0000
description:
Add support for mvsoc-based Armada XP peripherals.
Obtained from Marvell, Semihalf.
diffstat:
sys/arch/arm/marvell/mvsoc.c | 133 ++++++++++++++++++++++++++++++++++++-
sys/arch/arm/marvell/mvsoc_intr.c | 15 +++-
sys/arch/arm/marvell/mvsoc_space.c | 87 +++++++++++++++++++++++-
sys/arch/arm/marvell/mvsocreg.h | 34 ++++++++-
sys/arch/arm/marvell/mvsocvar.h | 23 ++++++-
5 files changed, 282 insertions(+), 10 deletions(-)
diffs (truncated from 483 to 300 lines):
diff -r afb59e48d3a4 -r 87cef0640f45 sys/arch/arm/marvell/mvsoc.c
--- a/sys/arch/arm/marvell/mvsoc.c Wed May 29 19:55:56 2013 +0000
+++ b/sys/arch/arm/marvell/mvsoc.c Wed May 29 20:47:14 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsoc.c,v 1.10 2012/10/19 06:14:44 msaitoh Exp $ */
+/* $NetBSD: mvsoc.c,v 1.11 2013/05/29 20:47:14 rkujawa Exp $ */
/*
* Copyright (c) 2007, 2008 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.10 2012/10/19 06:14:44 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsoc.c,v 1.11 2013/05/29 20:47:14 rkujawa Exp $");
#include "opt_cputypes.h"
#include "opt_mvsoc.h"
@@ -46,6 +46,11 @@
#include <arm/marvell/orionreg.h>
#include <arm/marvell/kirkwoodreg.h>
+#if defined(ARMADAXP)
+#include <evbarm/armadaxp/armadaxpreg.h>
+#include <evbarm/marvell/marvellreg.h>
+#endif
+
#include "locators.h"
#ifdef MVSOC_CONSOLE_EARLY
@@ -64,6 +69,9 @@
int nwindow = 0, nremap = 0;
static vaddr_t regbase = 0xffffffff, dsc_base, pex_base;
vaddr_t mlmb_base;
+#if defined(ARMADAXP)
+vaddr_t misc_base;
+#endif
void (*mvsoc_intr_init)(void);
@@ -175,8 +183,38 @@
{ KIRKWOOD_TAG_CRYPT,
KIRKWOOD_ATTR_CRYPT, KIRKWOOD_UNITID_CRYPT },
#endif
+#if defined(ARMADAXP)
+ { ARMADAXP_TAG_PEX00_MEM,
+ ARMADAXP_ATTR_PEXx0_MEM, ARMADAXP_UNITID_PEX0 },
+ { ARMADAXP_TAG_PEX00_IO,
+ ARMADAXP_ATTR_PEXx0_IO, ARMADAXP_UNITID_PEX0 },
+ { ARMADAXP_TAG_PEX01_MEM,
+ ARMADAXP_ATTR_PEXx1_MEM, ARMADAXP_UNITID_PEX0 },
+ { ARMADAXP_TAG_PEX01_IO,
+ ARMADAXP_ATTR_PEXx1_IO, ARMADAXP_UNITID_PEX0 },
+ { ARMADAXP_TAG_PEX02_MEM,
+ ARMADAXP_ATTR_PEXx2_MEM, ARMADAXP_UNITID_PEX0 },
+ { ARMADAXP_TAG_PEX02_IO,
+ ARMADAXP_ATTR_PEXx2_IO, ARMADAXP_UNITID_PEX0 },
+ { ARMADAXP_TAG_PEX03_MEM,
+ ARMADAXP_ATTR_PEXx3_MEM, ARMADAXP_UNITID_PEX0 },
+ { ARMADAXP_TAG_PEX03_IO,
+ ARMADAXP_ATTR_PEXx3_IO, ARMADAXP_UNITID_PEX0 },
+ { ARMADAXP_TAG_PEX2_MEM,
+ ARMADAXP_ATTR_PEX2_MEM, ARMADAXP_UNITID_PEX2 },
+ { ARMADAXP_TAG_PEX2_IO,
+ ARMADAXP_ATTR_PEX2_IO, ARMADAXP_UNITID_PEX2 },
+ { ARMADAXP_TAG_PEX3_MEM,
+ ARMADAXP_ATTR_PEX3_MEM, ARMADAXP_UNITID_PEX3 },
+ { ARMADAXP_TAG_PEX3_IO,
+ ARMADAXP_ATTR_PEX3_IO, ARMADAXP_UNITID_PEX3 },
+#endif
};
+#if defined(ARMADAXP)
+#undef ARMADAXP
+#define ARMADAXP(m) MARVELL_ARMADAXP_ ## m
+#endif
#if defined(ORION)
#define ORION_1(m) MARVELL_ORION_1_ ## m
#define ORION_2(m) MARVELL_ORION_2_ ## m
@@ -242,6 +280,15 @@
{ MV78XX0(MV78100), 2, "MV78100", "A1", "Discovery Innovation" },
{ MV78XX0(MV78200), 1, "MV78200", "A0", "Discovery Innovation" },
#endif
+
+#if defined(ARMADAXP)
+ { ARMADAXP(MV78130), 1, "MV78130", "A0", "Armada XP" },
+ { ARMADAXP(MV78160), 1, "MV78160", "A0", "Armada XP" },
+ { ARMADAXP(MV78230), 1, "MV78260", "A0", "Armada XP" },
+ { ARMADAXP(MV78260), 1, "MV78260", "A0", "Armada XP" },
+ { ARMADAXP(MV78460), 1, "MV78460", "A0", "Armada XP" },
+ { ARMADAXP(MV78460), 2, "MV78460", "B0", "Armada XP" },
+#endif
};
#define OFFSET_DEFAULT MVA_OFFSET_DEFAULT
@@ -445,6 +492,83 @@
{ MV78XX0(MV78200), "gttwsi",0,MVSOC_TWSI_BASE, MV78XX0_IRQ_TWSI },
:
#endif
+
+#if defined(ARMADAXP)
+ { ARMADAXP(MV78130), "mvsoctmr",0,MVSOC_TMR_BASE, ARMADAXP_IRQ_TIMER0 },
+ { ARMADAXP(MV78130), "com", 0, MVSOC_COM0_BASE, ARMADAXP_IRQ_UART0INT },
+ { ARMADAXP(MV78130), "com", 1, MVSOC_COM1_BASE, ARMADAXP_IRQ_UART1INT },
+ { ARMADAXP(MV78130), "com", 2, ARMADAXP_COM2_BASE, ARMADAXP_IRQ_UART2INT },
+ { ARMADAXP(MV78130), "com", 3, ARMADAXP_COM3_BASE, ARMADAXP_IRQ_UART3INT },
+ { ARMADAXP(MV78130), "mvsocrtc",0, ARMADAXP_RTC_BASE, ARMADAXP_IRQ_RTCINT },
+ { ARMADAXP(MV78130), "ehci", 0, ARMADAXP_USB0_BASE, ARMADAXP_IRQ_USB0INT },
+ { ARMADAXP(MV78130), "ehci", 1, ARMADAXP_USB1_BASE, ARMADAXP_IRQ_USB1INT },
+ { ARMADAXP(MV78130), "mvpex", 0, ARMADAXP_PEX00_BASE, ARMADAXP_IRQ_PEX00},
+ { ARMADAXP(MV78130), "mvpex", 1, ARMADAXP_PEX01_BASE, ARMADAXP_IRQ_PEX01},
+ { ARMADAXP(MV78130), "mvpex", 2, ARMADAXP_PEX02_BASE, ARMADAXP_IRQ_PEX02},
+ { ARMADAXP(MV78130), "mvpex", 3, ARMADAXP_PEX03_BASE, ARMADAXP_IRQ_PEX03},
+
+ { ARMADAXP(MV78160), "mvsoctmr",0,MVSOC_TMR_BASE, ARMADAXP_IRQ_TIMER0 },
+ { ARMADAXP(MV78160), "com", 0, MVSOC_COM0_BASE, ARMADAXP_IRQ_UART0INT },
+ { ARMADAXP(MV78160), "com", 1, MVSOC_COM1_BASE, ARMADAXP_IRQ_UART1INT },
+ { ARMADAXP(MV78160), "com", 2, ARMADAXP_COM2_BASE, ARMADAXP_IRQ_UART2INT },
+ { ARMADAXP(MV78160), "com", 3, ARMADAXP_COM3_BASE, ARMADAXP_IRQ_UART3INT },
+ { ARMADAXP(MV78160), "mvsocrtc",0, ARMADAXP_RTC_BASE, ARMADAXP_IRQ_RTCINT },
+ { ARMADAXP(MV78160), "ehci", 0, ARMADAXP_USB0_BASE, ARMADAXP_IRQ_USB0INT },
+ { ARMADAXP(MV78160), "ehci", 1, ARMADAXP_USB1_BASE, ARMADAXP_IRQ_USB1INT },
+ { ARMADAXP(MV78160), "mvpex", 0, ARMADAXP_PEX00_BASE, ARMADAXP_IRQ_PEX00},
+ { ARMADAXP(MV78160), "mvpex", 1, ARMADAXP_PEX01_BASE, ARMADAXP_IRQ_PEX01},
+ { ARMADAXP(MV78160), "mvpex", 2, ARMADAXP_PEX02_BASE, ARMADAXP_IRQ_PEX02},
+ { ARMADAXP(MV78160), "mvpex", 3, ARMADAXP_PEX03_BASE, ARMADAXP_IRQ_PEX03},
+ { ARMADAXP(MV78160), "mvpex", 4, ARMADAXP_PEX2_BASE, ARMADAXP_IRQ_PEX2},
+
+ { ARMADAXP(MV78230), "mvsoctmr",0,MVSOC_TMR_BASE, ARMADAXP_IRQ_TIMER0 },
+ { ARMADAXP(MV78230), "com", 0, MVSOC_COM0_BASE, ARMADAXP_IRQ_UART0INT },
+ { ARMADAXP(MV78230), "com", 1, MVSOC_COM1_BASE, ARMADAXP_IRQ_UART1INT },
+ { ARMADAXP(MV78230), "com", 2, ARMADAXP_COM2_BASE, ARMADAXP_IRQ_UART2INT },
+ { ARMADAXP(MV78230), "com", 3, ARMADAXP_COM3_BASE, ARMADAXP_IRQ_UART3INT },
+ { ARMADAXP(MV78230), "mvsocrtc",0, ARMADAXP_RTC_BASE, ARMADAXP_IRQ_RTCINT },
+ { ARMADAXP(MV78230), "ehci", 0, ARMADAXP_USB0_BASE, ARMADAXP_IRQ_USB0INT },
+ { ARMADAXP(MV78230), "ehci", 1, ARMADAXP_USB1_BASE, ARMADAXP_IRQ_USB1INT },
+ { ARMADAXP(MV78230), "mvpex", 0, ARMADAXP_PEX00_BASE, ARMADAXP_IRQ_PEX00},
+ { ARMADAXP(MV78230), "mvpex", 1, ARMADAXP_PEX01_BASE, ARMADAXP_IRQ_PEX01},
+ { ARMADAXP(MV78230), "mvpex", 2, ARMADAXP_PEX02_BASE, ARMADAXP_IRQ_PEX02},
+ { ARMADAXP(MV78230), "mvpex", 3, ARMADAXP_PEX03_BASE, ARMADAXP_IRQ_PEX03},
+ { ARMADAXP(MV78230), "mvpex", 4, ARMADAXP_PEX2_BASE, ARMADAXP_IRQ_PEX2},
+
+ { ARMADAXP(MV78260), "mvsoctmr",0,MVSOC_TMR_BASE, ARMADAXP_IRQ_TIMER0 },
+ { ARMADAXP(MV78260), "com", 0, MVSOC_COM0_BASE, ARMADAXP_IRQ_UART0INT },
+ { ARMADAXP(MV78260), "com", 1, MVSOC_COM1_BASE, ARMADAXP_IRQ_UART1INT },
+ { ARMADAXP(MV78260), "com", 2, ARMADAXP_COM2_BASE, ARMADAXP_IRQ_UART2INT },
+ { ARMADAXP(MV78260), "com", 3, ARMADAXP_COM3_BASE, ARMADAXP_IRQ_UART3INT },
+ { ARMADAXP(MV78260), "mvsocrtc",0, ARMADAXP_RTC_BASE, ARMADAXP_IRQ_RTCINT },
+ { ARMADAXP(MV78260), "ehci", 0, ARMADAXP_USB0_BASE, ARMADAXP_IRQ_USB0INT },
+ { ARMADAXP(MV78260), "ehci", 1, ARMADAXP_USB1_BASE, ARMADAXP_IRQ_USB1INT },
+ { ARMADAXP(MV78260), "mvpex", 0, ARMADAXP_PEX00_BASE, ARMADAXP_IRQ_PEX00},
+ { ARMADAXP(MV78260), "mvpex", 1, ARMADAXP_PEX01_BASE, ARMADAXP_IRQ_PEX01},
+ { ARMADAXP(MV78260), "mvpex", 2, ARMADAXP_PEX02_BASE, ARMADAXP_IRQ_PEX02},
+ { ARMADAXP(MV78260), "mvpex", 3, ARMADAXP_PEX03_BASE, ARMADAXP_IRQ_PEX03},
+ { ARMADAXP(MV78260), "mvpex", 4, ARMADAXP_PEX2_BASE, ARMADAXP_IRQ_PEX2},
+
+ { ARMADAXP(MV78460), "mvsoctmr",0,MVSOC_TMR_BASE, ARMADAXP_IRQ_TIMER0 },
+ { ARMADAXP(MV78460), "com", 0, MVSOC_COM0_BASE, ARMADAXP_IRQ_UART0INT },
+ { ARMADAXP(MV78460), "com", 1, MVSOC_COM1_BASE, ARMADAXP_IRQ_UART1INT },
+ { ARMADAXP(MV78460), "com", 2, ARMADAXP_COM2_BASE, ARMADAXP_IRQ_UART2INT },
+ { ARMADAXP(MV78460), "com", 3, ARMADAXP_COM3_BASE, ARMADAXP_IRQ_UART3INT },
+ { ARMADAXP(MV78460), "mvsocrtc",0, ARMADAXP_RTC_BASE, ARMADAXP_IRQ_RTCINT },
+ { ARMADAXP(MV78460), "ehci", 0, ARMADAXP_USB0_BASE, ARMADAXP_IRQ_USB0INT },
+ { ARMADAXP(MV78460), "ehci", 1, ARMADAXP_USB1_BASE, ARMADAXP_IRQ_USB1INT },
+ { ARMADAXP(MV78460), "mvpex", 0, ARMADAXP_PEX00_BASE, ARMADAXP_IRQ_PEX00},
+ { ARMADAXP(MV78460), "mvpex", 1, ARMADAXP_PEX01_BASE, ARMADAXP_IRQ_PEX01},
+ { ARMADAXP(MV78460), "mvpex", 2, ARMADAXP_PEX02_BASE, ARMADAXP_IRQ_PEX02},
+ { ARMADAXP(MV78460), "mvpex", 3, ARMADAXP_PEX03_BASE, ARMADAXP_IRQ_PEX03},
+ { ARMADAXP(MV78460), "mvpex", 4, ARMADAXP_PEX2_BASE, ARMADAXP_IRQ_PEX2},
+ { ARMADAXP(MV78460), "mvpex", 5, ARMADAXP_PEX3_BASE, ARMADAXP_IRQ_PEX3},
+ { ARMADAXP(MV78460), "mvsata", 0, ARMADAXP_SATAHC_BASE, ARMADAXP_IRQ_SATA0 },
+ { ARMADAXP(MV78460), "gttwsi", 0, ARMADAXP_TWSI0_BASE, ARMADAXP_IRQ_TWSI0},
+ { ARMADAXP(MV78460), "gttwsi", 1, ARMADAXP_TWSI1_BASE, ARMADAXP_IRQ_TWSI1},
+ { ARMADAXP(MV78460), "mvspi", 0, ARMADAXP_SPI0_BASE, ARMADAXP_IRQ_SPI0},
+ { ARMADAXP(MV78460), "mvspi", 1, ARMADAXP_SPI1_BASE, ARMADAXP_IRQ_SPI0},
+#endif
};
@@ -594,7 +718,12 @@
mvsoc_bootstrap(bus_addr_t iobase)
{
+#if defined(ARMADAXP)
+ regbase = MARVELL_INTERREGS_PBASE;
+ misc_base = iobase + MVSOC_MISC_BASE;
+#else
regbase = iobase;
+#endif
dsc_base = iobase + MVSOC_DSC_BASE;
mlmb_base = iobase + MVSOC_MLMB_BASE;
pex_base = iobase + MVSOC_PEX_BASE;
diff -r afb59e48d3a4 -r 87cef0640f45 sys/arch/arm/marvell/mvsoc_intr.c
--- a/sys/arch/arm/marvell/mvsoc_intr.c Wed May 29 19:55:56 2013 +0000
+++ b/sys/arch/arm/marvell/mvsoc_intr.c Wed May 29 20:47:14 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsoc_intr.c,v 1.5 2012/07/29 00:07:10 matt Exp $ */
+/* $NetBSD: mvsoc_intr.c,v 1.6 2013/05/29 20:47:14 rkujawa Exp $ */
/*
* Copyright (c) 2010 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsoc_intr.c,v 1.5 2012/07/29 00:07:10 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsoc_intr.c,v 1.6 2013/05/29 20:47:14 rkujawa Exp $");
#define _INTR_PRIVATE
@@ -40,6 +40,12 @@
#include <arm/marvell/mvsocreg.h>
#include <arm/marvell/mvsocvar.h>
+#include "opt_mvsoc.h"
+
+#if defined(ARMADAXP)
+extern void armadaxp_handle_irq(void *);
+#endif
+
int (*find_pending_irqs)(void);
static void mvsoc_bridge_pic_unblock_irqs(struct pic_softc *, size_t, uint32_t);
@@ -74,6 +80,10 @@
mvsoc_irq_handler(void *frame)
{
struct cpu_info * const ci = curcpu();
+#if defined(ARMADAXP)
+ ci->ci_data.cpu_nintr++;
+ armadaxp_handle_irq(frame);
+#else
const int oldipl = ci->ci_cpl;
const uint32_t oldipl_mask = __BIT(oldipl);
int ipl_mask = 0;
@@ -87,6 +97,7 @@
*/
if ((ipl_mask & ~oldipl_mask) > oldipl_mask)
pic_do_pending_ints(I32_bit, oldipl, frame);
+#endif
}
/*
diff -r afb59e48d3a4 -r 87cef0640f45 sys/arch/arm/marvell/mvsoc_space.c
--- a/sys/arch/arm/marvell/mvsoc_space.c Wed May 29 19:55:56 2013 +0000
+++ b/sys/arch/arm/marvell/mvsoc_space.c Wed May 29 20:47:14 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsoc_space.c,v 1.5 2012/07/28 23:13:16 matt Exp $ */
+/* $NetBSD: mvsoc_space.c,v 1.6 2013/05/29 20:47:14 rkujawa Exp $ */
/*
* Copyright (c) 2007 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsoc_space.c,v 1.5 2012/07/28 23:13:16 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsoc_space.c,v 1.6 2013/05/29 20:47:14 rkujawa Exp $");
#include "opt_mvsoc.h"
#include "mvpex.h"
@@ -214,6 +214,81 @@
#endif
};
#endif
+
+#if defined(ARMADAXP)
+struct bus_space armadaxp_pex00_mem_bs_tag = {
+ /* cookie */
+ (void *)ARMADAXP_TAG_PEX00_MEM,
+
+ MVSOC_BUS_SPACE_DEFAULT_FUNCS
+};
+struct bus_space armadaxp_pex00_io_bs_tag = {
+ /* cookie */
+ (void *)ARMADAXP_TAG_PEX00_IO,
+
+ MVSOC_BUS_SPACE_DEFAULT_FUNCS
+};
+struct bus_space armadaxp_pex01_mem_bs_tag = {
+ /* cookie */
+ (void *)ARMADAXP_TAG_PEX01_MEM,
+
+ MVSOC_BUS_SPACE_DEFAULT_FUNCS
+};
+struct bus_space armadaxp_pex01_io_bs_tag = {
+ /* cookie */
+ (void *)ARMADAXP_TAG_PEX01_IO,
+
+ MVSOC_BUS_SPACE_DEFAULT_FUNCS
+};
+struct bus_space armadaxp_pex02_mem_bs_tag = {
+ /* cookie */
+ (void *)ARMADAXP_TAG_PEX02_MEM,
+
+ MVSOC_BUS_SPACE_DEFAULT_FUNCS
+};
+struct bus_space armadaxp_pex02_io_bs_tag = {
+ /* cookie */
+ (void *)ARMADAXP_TAG_PEX02_IO,
+
Home |
Main Index |
Thread Index |
Old Index