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[src/netbsd-7]: src/sys/arch/arm Pull up following revision(s) (requested by ...
details: https://anonhg.NetBSD.org/src/rev/6d18473b371a
branches: netbsd-7
changeset: 799379:6d18473b371a
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Wed May 27 05:33:29 2015 +0000
description:
Pull up following revision(s) (requested by skrll in ticket #805):
sys/arch/arm/include/arm32/pmap.h: revision 1.138
sys/arch/arm/arm/cpufunc.c: revision 1.151
sys/arch/arm/arm32/bus_dma.c: revision 1.90
sys/arch/arm/broadcom/bcm53xx_pax.c: revision 1.14
sys/arch/arm/arm32/bus_dma.c: revision 1.91
sys/arch/arm/samsung/exynos_space.c: revision 1.2
sys/arch/arm/arm32/db_machdep.c: revision 1.23
sys/arch/arm/allwinner/awin_space.c: revision 1.4
sys/arch/arm/include/rwlock.h: revision 1.9
sys/arch/arm/amlogic/amlogic_space.c: revision 1.2
sys/arch/arm/zynq/zynq_space.c: revision 1.2
sys/arch/arm/broadcom/bcm2835_space.c: revision 1.7
sys/arch/arm/arm32/pmap.c: revision 1.317
sys/arch/arm/include/locore.h: revision 1.19
sys/arch/arm/include/mutex.h: revision 1.20
sys/arch/arm/include/lock.h: revision 1.31
sys/arch/arm/include/lock.h: revision 1.32
sys/arch/arm/broadcom/bcmgen_space.c: revision 1.5
- Kill redundant semicolons.
- Indentation.
- Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
userland
diffstat:
sys/arch/arm/allwinner/awin_space.c | 17 ++++-------------
sys/arch/arm/amlogic/amlogic_space.c | 17 ++++-------------
sys/arch/arm/arm/cpufunc.c | 8 ++++----
sys/arch/arm/arm32/bus_dma.c | 8 ++++----
sys/arch/arm/arm32/db_machdep.c | 8 ++++----
sys/arch/arm/arm32/pmap.c | 8 +++-----
sys/arch/arm/broadcom/bcm2835_space.c | 13 ++++---------
sys/arch/arm/broadcom/bcm53xx_pax.c | 6 +++---
sys/arch/arm/broadcom/bcmgen_space.c | 17 ++++-------------
sys/arch/arm/include/arm32/pmap.h | 7 +++----
sys/arch/arm/include/lock.h | 10 +++++-----
sys/arch/arm/include/locore.h | 8 ++++----
sys/arch/arm/include/mutex.h | 6 +++---
sys/arch/arm/include/rwlock.h | 6 +++---
sys/arch/arm/samsung/exynos_space.c | 17 ++++-------------
sys/arch/arm/zynq/zynq_space.c | 17 ++++-------------
16 files changed, 60 insertions(+), 113 deletions(-)
diffs (truncated from 524 to 300 lines):
diff -r 0cf9a35192dd -r 6d18473b371a sys/arch/arm/allwinner/awin_space.c
--- a/sys/arch/arm/allwinner/awin_space.c Tue May 26 02:29:44 2015 +0000
+++ b/sys/arch/arm/allwinner/awin_space.c Wed May 27 05:33:29 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_space.c,v 1.3 2014/02/20 21:45:49 matt Exp $ */
+/* $NetBSD: awin_space.c,v 1.3.10.1 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: awin_space.c,v 1.3 2014/02/20 21:45:49 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: awin_space.c,v 1.3.10.1 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -366,17 +366,8 @@
{
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
- if (flags) {
- /* Issue an ARM11 Data Syncronisation Barrier (DSB) */
-#ifdef _ARM_ARCH_7
- __asm __volatile("dsb");
-#else
- __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
- : "memory");
-#endif
- return;
- }
-
+ if (flags)
+ arm_dsb();
}
void *
diff -r 0cf9a35192dd -r 6d18473b371a sys/arch/arm/amlogic/amlogic_space.c
--- a/sys/arch/arm/amlogic/amlogic_space.c Tue May 26 02:29:44 2015 +0000
+++ b/sys/arch/arm/amlogic/amlogic_space.c Wed May 27 05:33:29 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: amlogic_space.c,v 1.2.2.2 2015/03/21 08:51:17 snj Exp $ */
+/* $NetBSD: amlogic_space.c,v 1.2.2.3 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amlogic_space.c,v 1.2.2.2 2015/03/21 08:51:17 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amlogic_space.c,v 1.2.2.3 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -366,17 +366,8 @@
{
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
- if (flags) {
- /* Issue an ARM11 Data Syncronisation Barrier (DSB) */
-#ifdef _ARM_ARCH_7
- __asm __volatile("dsb");
-#else
- __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
- : "memory");
-#endif
- return;
- }
-
+ if (flags)
+ arm_dsb();
}
void *
diff -r 0cf9a35192dd -r 6d18473b371a sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c Tue May 26 02:29:44 2015 +0000
+++ b/sys/arch/arm/arm/cpufunc.c Wed May 27 05:33:29 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.150 2014/07/31 07:14:42 skrll Exp $ */
+/* $NetBSD: cpufunc.c,v 1.150.2.1 2015/05/27 05:33:29 msaitoh Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.150 2014/07/31 07:14:42 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.150.2.1 2015/05/27 05:33:29 msaitoh Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -1490,9 +1490,9 @@
#if defined(CPU_ARMV7)
__asm volatile(".arch\tarmv7a");
__asm volatile("mcr p15, 2, %0, c0, c0, 0" :: "r" (cssr));
- __asm volatile("isb"); /* sync to the new cssr */
+ __asm volatile("isb" ::: "memory"); /* sync to the new cssr */
#else
- __asm volatile("mcr p15, 1, %0, c0, c0, 2" :: "r" (cssr));
+ __asm volatile("mcr p15, 1, %0, c0, c0, 2" :: "r" (cssr) : "memory");
#endif
__asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (csid));
return csid;
diff -r 0cf9a35192dd -r 6d18473b371a sys/arch/arm/arm32/bus_dma.c
--- a/sys/arch/arm/arm32/bus_dma.c Tue May 26 02:29:44 2015 +0000
+++ b/sys/arch/arm/arm32/bus_dma.c Wed May 27 05:33:29 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_dma.c,v 1.86.2.2 2014/11/14 07:29:13 martin Exp $ */
+/* $NetBSD: bus_dma.c,v 1.86.2.3 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
#include "opt_arm_bus_space.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.86.2.2 2014/11/14 07:29:13 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.86.2.3 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -832,13 +832,13 @@
*/
case BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE:
STAT_INCR(sync_postreadwrite);
- __asm __volatile("dmb" ::: "memory");;
+ arm_dmb();
cpu_dcache_inv_range(va, len);
cpu_sdcache_inv_range(va, pa, len);
break;
case BUS_DMASYNC_POSTREAD:
STAT_INCR(sync_postread);
- __asm __volatile("dmb" ::: "memory");;
+ arm_dmb();
cpu_dcache_inv_range(va, len);
cpu_sdcache_inv_range(va, pa, len);
break;
diff -r 0cf9a35192dd -r 6d18473b371a sys/arch/arm/arm32/db_machdep.c
--- a/sys/arch/arm/arm32/db_machdep.c Tue May 26 02:29:44 2015 +0000
+++ b/sys/arch/arm/arm32/db_machdep.c Wed May 27 05:33:29 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.21.4.1 2014/11/09 16:05:25 martin Exp $ */
+/* $NetBSD: db_machdep.c,v 1.21.4.2 2015/05/27 05:33:29 msaitoh Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe
@@ -33,7 +33,7 @@
#endif
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.21.4.1 2014/11/09 16:05:25 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.21.4.2 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/cpu.h>
@@ -385,7 +385,7 @@
armreg_tlbdataop_write(
__SHIFTIN(va_index, dti->dti_index)
| __SHIFTIN(way, ARM_TLBDATAOP_WAY));
- __asm("isb");
+ arm_isb();
const uint32_t d0 = armreg_tlbdata0_read();
const uint32_t d1 = armreg_tlbdata1_read();
if ((d0 & ARM_TLBDATA_VALID)
@@ -406,7 +406,7 @@
armreg_tlbdataop_write(
__SHIFTIN(way, ARM_TLBDATAOP_WAY)
| __SHIFTIN(va_index, dti->dti_index));
- __asm("isb");
+ arm_isb();
const uint32_t d0 = armreg_tlbdata0_read();
const uint32_t d1 = armreg_tlbdata1_read();
if (d0 & ARM_TLBDATA_VALID) {
diff -r 0cf9a35192dd -r 6d18473b371a sys/arch/arm/arm32/pmap.c
--- a/sys/arch/arm/arm32/pmap.c Tue May 26 02:29:44 2015 +0000
+++ b/sys/arch/arm/arm32/pmap.c Wed May 27 05:33:29 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.295.2.6 2015/05/26 01:34:40 msaitoh Exp $ */
+/* $NetBSD: pmap.c,v 1.295.2.7 2015/05/27 05:33:29 msaitoh Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -217,7 +217,7 @@
#include <arm/locore.h>
//#include <arm/arm32/katelib.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.295.2.6 2015/05/26 01:34:40 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.295.2.7 2015/05/27 05:33:29 msaitoh Exp $");
//#define PMAP_DEBUG
#ifdef PMAP_DEBUG
@@ -974,9 +974,7 @@
{
if (PMAP_NEEDS_PTE_SYNC && pmap_is_cached(pm))
PTE_SYNC(ptep);
-#if ARM_MMU_V7 > 0
- __asm("dsb":::"memory");
-#endif
+ arm_dsb();
}
#ifdef PMAP_INCLUDE_PTE_SYNC
diff -r 0cf9a35192dd -r 6d18473b371a sys/arch/arm/broadcom/bcm2835_space.c
--- a/sys/arch/arm/broadcom/bcm2835_space.c Tue May 26 02:29:44 2015 +0000
+++ b/sys/arch/arm/broadcom/bcm2835_space.c Wed May 27 05:33:29 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_space.c,v 1.6.10.1 2015/03/11 20:22:55 snj Exp $ */
+/* $NetBSD: bcm2835_space.c,v 1.6.10.2 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_space.c,v 1.6.10.1 2015/03/11 20:22:55 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_space.c,v 1.6.10.2 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -361,13 +361,8 @@
{
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
- if (flags) {
- /* Issue an ARM11 Data Syncronisation Barrier (DSB) */
- __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
- : "memory");
- return;
- }
-
+ if (flags)
+ arm_dsb();
}
void *
diff -r 0cf9a35192dd -r 6d18473b371a sys/arch/arm/broadcom/bcm53xx_pax.c
--- a/sys/arch/arm/broadcom/bcm53xx_pax.c Tue May 26 02:29:44 2015 +0000
+++ b/sys/arch/arm/broadcom/bcm53xx_pax.c Wed May 27 05:33:29 2015 +0000
@@ -34,7 +34,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: bcm53xx_pax.c,v 1.13 2014/03/30 01:12:18 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bcm53xx_pax.c,v 1.13.4.1 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -419,12 +419,12 @@
bcmpax_write_4(sc, PCIE_CFG_IND_ADDR,
__SHIFTIN(func, CFG_IND_ADDR_FUNC)
| __SHIFTIN(reg, CFG_IND_ADDR_REG));
- __asm __volatile("dsb");
+ arm_dsb();
return PCIE_CFG_IND_DATA;
}
if (sc->sc_linkup) {
bcmpax_write_4(sc, PCIE_CFG_ADDR, tag);
- __asm __volatile("dsb");
+ arm_dsb();
return PCIE_CFG_DATA;
}
return 0;
diff -r 0cf9a35192dd -r 6d18473b371a sys/arch/arm/broadcom/bcmgen_space.c
--- a/sys/arch/arm/broadcom/bcmgen_space.c Tue May 26 02:29:44 2015 +0000
+++ b/sys/arch/arm/broadcom/bcmgen_space.c Wed May 27 05:33:29 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bcmgen_space.c,v 1.4 2013/10/28 22:51:16 matt Exp $ */
+/* $NetBSD: bcmgen_space.c,v 1.4.6.1 2015/05/27 05:33:29 msaitoh Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcmgen_space.c,v 1.4 2013/10/28 22:51:16 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcmgen_space.c,v 1.4.6.1 2015/05/27 05:33:29 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -241,17 +241,8 @@
{
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
- if (flags) {
- /* Issue an ARM11 Data Syncronisation Barrier (DSB) */
-#ifdef _ARM_ARCH_7
- __asm __volatile("dsb");
-#else
- __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
- : "memory");
-#endif
- return;
- }
-
+ if (flags)
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