[src/trunk]: src/sys/arch/powerpc/pic special case IPIs so we don't mess with...

[macallan <macallan%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/8026a2b0f715
branches:  trunk
changeset: 832543:8026a2b0f715
user:      macallan <macallan%NetBSD.org@localhost>
date:      Wed May 16 21:54:38 2018 +0000

description:
special case IPIs so we don't mess with hardware IRQ sources
now SMP works on my PCI-X G5

diffstat:

 sys/arch/powerpc/pic/pic_openpic.c |  20 ++++++++++++++------
 1 files changed, 14 insertions(+), 6 deletions(-)

diffs (69 lines):

diff -r 3b699667e8bf -r 8026a2b0f715 sys/arch/powerpc/pic/pic_openpic.c
--- a/sys/arch/powerpc/pic/pic_openpic.c        Wed May 16 20:21:39 2018 +0000
+++ b/sys/arch/powerpc/pic/pic_openpic.c        Wed May 16 21:54:38 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pic_openpic.c,v 1.13 2018/03/22 21:27:36 macallan Exp $ */
+/*     $NetBSD: pic_openpic.c,v 1.14 2018/05/16 21:54:38 macallan Exp $ */
 
 /*-
  * Copyright (c) 2007 Michael Lorenz
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pic_openpic.c,v 1.13 2018/03/22 21:27:36 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_openpic.c,v 1.14 2018/05/16 21:54:38 macallan Exp $");
 
 #include <sys/param.h>
 #include <sys/kmem.h>
@@ -66,7 +66,7 @@
            "Supports %d CPUs and %d interrupt sources.\n",
            x & 0xff, ((x & 0x1f00) >> 8) + 1, ((x & 0x07ff0000) >> 16) + 1);
 
-       pic->pic_numintrs = ((x & 0x07ff0000) >> 16) + 2; /* one more slot for IPI */
+       pic->pic_numintrs = IPI_VECTOR + 1;
        pic->pic_cookie = addr;
        pic->pic_enable_irq = opic_enable_irq;
        pic->pic_reenable_irq = opic_enable_irq;
@@ -92,7 +92,7 @@
 #if 1
        openpic_set_priority(0, 15);
 
-       for (irq = 0; irq < pic->pic_numintrs; irq++) {
+       for (irq = 0; irq < (pic->pic_numintrs - 1); irq++) {
                /* make sure to keep disabled */
                openpic_write(OPENPIC_SRC_VECTOR(irq), OPENPIC_IMASK);
                /* send all interrupts to CPU 0 */
@@ -155,7 +155,10 @@
                x |= OPENPIC_SENSE_LEVEL;
 
        x |= realpri << OPENPIC_PRIORITY_SHIFT;
-       openpic_write(OPENPIC_SRC_VECTOR(irq), x);
+#ifdef MULTIPROCESSOR
+       if (irq < IPI_VECTOR)
+#endif 
+               openpic_write(OPENPIC_SRC_VECTOR(irq), x);
 
        aprint_debug("%s: setting IRQ %d to priority %d\n", __func__, irq,
            realpri);
@@ -165,7 +168,9 @@
 opic_enable_irq(struct pic_ops *pic, int irq, int type)
 {
        u_int x;
-
+#ifdef MULTIPROCESSOR
+       if (irq == IPI_VECTOR) return;
+#endif
        x = openpic_read(OPENPIC_SRC_VECTOR(irq));
        x &= ~OPENPIC_IMASK;
        openpic_write(OPENPIC_SRC_VECTOR(irq), x);
@@ -176,6 +181,9 @@
 {
        u_int x;
 
+#ifdef MULTIPROCESSOR
+       if (irq == IPI_VECTOR) return;
+#endif
        x = openpic_read(OPENPIC_SRC_VECTOR(irq));
        x |= OPENPIC_IMASK;
        openpic_write(OPENPIC_SRC_VECTOR(irq), x);