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[src/trunk]: src/sys/arch/arm/dts Add operating points for OrangePi Plus2E an...



details:   https://anonhg.NetBSD.org/src/rev/abe5f0f64e06
branches:  trunk
changeset: 826869:abe5f0f64e06
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Mon Oct 02 22:51:15 2017 +0000

description:
Add operating points for OrangePi Plus2E and enable cpufreq scaling.

diffstat:

 sys/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts |  32 ++++++++++++++++++++++++++-
 sys/arch/arm/dts/sun8i-h3.dtsi                |  18 ++++++++++++++-
 2 files changed, 48 insertions(+), 2 deletions(-)

diffs (89 lines):

diff -r 2d47ca8bdae4 -r abe5f0f64e06 sys/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
--- a/sys/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts     Mon Oct 02 22:50:29 2017 +0000
+++ b/sys/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts     Mon Oct 02 22:51:15 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i-h3-orangepi-plus2e.dts,v 1.1 2017/07/13 01:17:58 jmcneill Exp $ */
+/* $NetBSD: sun8i-h3-orangepi-plus2e.dts,v 1.2 2017/10/02 22:51:15 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -41,6 +41,20 @@
                enable-active-high;
                gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
        };
+
+       cpus {
+               cpu@0 {
+                       cpu-supply = <&vdd_cpu>;
+                       operating-points = <
+                               /* kHz    uV */
+                               1296000 1340000
+                               1200000 1320000
+                               1008000 1200000
+                               816000  1100000
+                               648000  1040000
+                               >;
+               };
+       };
 };
 
 &emac {
@@ -57,3 +71,19 @@
                reg = <1>;
        };
 };
+
+&r_i2c {
+       status = "okay";
+
+       vdd_cpu: regulator@65 {
+               compatible = "silergy,sy8106a";
+               reg = <0x65>;
+
+               regulator-name = "vdd-cpu";
+               regulator-min-microvolt = <1000000>;
+               regulator-max-microvolt = <1400000>;
+               regulator-ramp-delay = <200>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+};
diff -r 2d47ca8bdae4 -r abe5f0f64e06 sys/arch/arm/dts/sun8i-h3.dtsi
--- a/sys/arch/arm/dts/sun8i-h3.dtsi    Mon Oct 02 22:50:29 2017 +0000
+++ b/sys/arch/arm/dts/sun8i-h3.dtsi    Mon Oct 02 22:51:15 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i-h3.dtsi,v 1.2 2017/09/02 17:35:07 jmcneill Exp $ */
+/* $NetBSD: sun8i-h3.dtsi,v 1.3 2017/10/02 22:51:15 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -40,6 +40,13 @@
                };
        };
 
+       cpus {
+               cpu@0 {
+                       clocks = <&ccu CLK_CPUX>;
+                       clock-latency = <2000000>;
+               };
+       };
+
        soc {
                emac: ethernet@1c30000 {
                        compatible = "allwinner,sun8i-h3-emac";
@@ -54,6 +61,15 @@
                        #size-cells = <0>;
                        status = "disabled";
                };
+
+               r_i2c: i2c@1f02400 {
+                       compatible = "allwinner,sun6i-a31-i2c";
+                       reg = <0x01f02400 0x400>;
+                       interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
        };
 };
 



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