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[src/trunk]: src/sys/arch/arm/samsung No need to use hold reg when updating c...



details:   https://anonhg.NetBSD.org/src/rev/49a5b0b0519b
branches:  trunk
changeset: 833599:49a5b0b0519b
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Mon Jul 02 23:52:53 2018 +0000

description:
No need to use hold reg when updating clocks, and auto-discover some values.

diffstat:

 sys/arch/arm/samsung/exynos_dwcmmc.c |  14 ++++----------
 1 files changed, 4 insertions(+), 10 deletions(-)

diffs (56 lines):

diff -r 4609e2ccbb44 -r 49a5b0b0519b sys/arch/arm/samsung/exynos_dwcmmc.c
--- a/sys/arch/arm/samsung/exynos_dwcmmc.c      Mon Jul 02 20:28:24 2018 +0000
+++ b/sys/arch/arm/samsung/exynos_dwcmmc.c      Mon Jul 02 23:52:53 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: exynos_dwcmmc.c,v 1.6 2018/07/02 20:28:24 jmcneill Exp $ */
+/* $NetBSD: exynos_dwcmmc.c,v 1.7 2018/07/02 23:52:53 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: exynos_dwcmmc.c,v 1.6 2018/07/02 20:28:24 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: exynos_dwcmmc.c,v 1.7 2018/07/02 23:52:53 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -43,7 +43,6 @@
 #include <dev/ic/dwc_mmc_var.h>
 #include <dev/fdt/fdtvar.h>
 
-#define        FIFO_REG        0x200
 #define        MPS_BEGIN       0x200
 #define        MPS_END         0x204
 #define        MPS_CTRL        0x20c
@@ -94,7 +93,6 @@
        char intrstr[128];
        bus_addr_t addr;
        bus_size_t size;
-       u_int fifo_depth;
        int error;
 
        if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
@@ -102,9 +100,6 @@
                return;
        }
 
-       if (of_getprop_uint32(phandle, "fifo-depth", &fifo_depth)) {
-               fifo_depth = 64;
-       }
        if (of_getprop_uint32(phandle, "samsung,dw-mshc-ciu-div", &esc->sc_ciu_div)) {
                aprint_error(": missing samsung,dw-mshc-ciu-div property\n");
                return;
@@ -143,9 +138,8 @@
        }
 
        sc->sc_clock_freq = clk_get_rate(esc->sc_clk_ciu) / (esc->sc_ciu_div + 1);
-       sc->sc_fifo_depth = fifo_depth;
-       sc->sc_fifo_reg = FIFO_REG;
-       sc->sc_flags = DWC_MMC_F_USE_HOLD_REG | DWC_MMC_F_DMA;
+       of_getprop_uint32(phandle, "fifo-depth", &sc->sc_fifo_depth);
+       sc->sc_flags = DWC_MMC_F_DMA;
        sc->sc_bus_clock = exynos_dwcmmc_bus_clock;
 
        esc->sc_pin_cd = fdtbus_gpio_acquire(phandle, "cd-gpios",



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