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[src/trunk]: src/sys/external/bsd/drm2 New option AMDGPU_CIK for devices cove...
details: https://anonhg.NetBSD.org/src/rev/86bb6371f9bc
branches: trunk
changeset: 835358:86bb6371f9bc
user: riastradh <riastradh%NetBSD.org@localhost>
date: Mon Aug 27 14:22:31 2018 +0000
description:
New option AMDGPU_CIK for devices covered by radeon and amdgpu.
diffstat:
sys/external/bsd/drm2/amdgpu/files.amdgpu | 16 +-
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu.h | 10 +-
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ci_dpm.c | 6716 +++++++++++
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ci_smc.c | 284 +
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik.c | 2526 ++++
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik_ih.c | 476 +
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik_sdma.c | 1420 ++
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_dce_v8_0.c | 3783 ++++++
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_gfx_v7_0.c | 5670 +++++++++
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_kv_dpm.c | 3354 +++++
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_kv_smc.c | 224 +
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_uvd_v4_2.c | 910 +
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_vce_v2_0.c | 668 +
sys/external/bsd/drm2/dist/drm/amd/amdgpu/ci_dpm.c | 6716 -----------
sys/external/bsd/drm2/dist/drm/amd/amdgpu/ci_smc.c | 284 -
sys/external/bsd/drm2/dist/drm/amd/amdgpu/cik.c | 2526 ----
sys/external/bsd/drm2/dist/drm/amd/amdgpu/cik_ih.c | 476 -
sys/external/bsd/drm2/dist/drm/amd/amdgpu/cik_sdma.c | 1420 --
sys/external/bsd/drm2/dist/drm/amd/amdgpu/dce_v8_0.c | 3783 ------
sys/external/bsd/drm2/dist/drm/amd/amdgpu/gfx_v7_0.c | 5670 ---------
sys/external/bsd/drm2/dist/drm/amd/amdgpu/kv_dpm.c | 3354 -----
sys/external/bsd/drm2/dist/drm/amd/amdgpu/kv_smc.c | 224 -
sys/external/bsd/drm2/dist/drm/amd/amdgpu/uvd_v4_2.c | 910 -
sys/external/bsd/drm2/dist/drm/amd/amdgpu/vce_v2_0.c | 668 -
24 files changed, 26055 insertions(+), 26033 deletions(-)
diffs (truncated from 52247 to 300 lines):
diff -r f2f6bea8c954 -r 86bb6371f9bc sys/external/bsd/drm2/amdgpu/files.amdgpu
--- a/sys/external/bsd/drm2/amdgpu/files.amdgpu Mon Aug 27 14:20:41 2018 +0000
+++ b/sys/external/bsd/drm2/amdgpu/files.amdgpu Mon Aug 27 14:22:31 2018 +0000
@@ -1,9 +1,11 @@
-# $NetBSD: files.amdgpu,v 1.2 2018/08/27 14:10:14 riastradh Exp $
+# $NetBSD: files.amdgpu,v 1.3 2018/08/27 14:22:31 riastradh Exp $
define amdgpufbbus { }
device amdgpu: drmkms, drmkms_pci, drmkms_ttm, amdgpufbbus, firmload
attach amdgpu at pci
+defflag opt_amdgpu_cik.h AMDGPU_CIK
+
device amdgpufb: amdgpufbbus, drmfb, drmfb_pci, wsemuldisplaydev
attach amdgpufb at amdgpufbbus
@@ -29,6 +31,7 @@
#file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_acpi.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_afmt.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_amdkfd.c amdgpu
+file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c amdgpu & AMDGPU_CIK
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_atom.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_atombios.c amdgpu
@@ -40,6 +43,11 @@
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_bios.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_bo_list.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cgs.c amdgpu
+file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ci_dpm.c amdgpu & AMDGPU_CIK
+file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ci_smc.c amdgpu & AMDGPU_CIK
+file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik.c amdgpu & AMDGPU_CIK
+file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik_ih.c amdgpu & AMDGPU_CIK
+file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik_sdma.c amdgpu & AMDGPU_CIK
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_connectors.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cs.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ctx.c amdgpu
@@ -48,6 +56,7 @@
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cz_smc.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_dce_v10_0.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_dce_v11_0.c amdgpu
+file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_dce_v8_0.c amdgpu & AMDGPU_CIK
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_device.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_display.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_dpm.c amdgpu
@@ -60,6 +69,7 @@
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_gart.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_gem.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_gfx.c amdgpu
+file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_gfx_v7_0.c amdgpu & AMDGPU_CIK
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_gfx_v8_0.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_gmc_v7_0.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_gmc_v8_0.c amdgpu
@@ -71,6 +81,8 @@
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ih.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_irq.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_kms.c amdgpu
+file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_kv_dpm.c amdgpu & AMDGPU_CIK
+file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_kv_smc.c amdgpu & AMDGPU_CIK
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_object.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_pll.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_pm.c amdgpu
@@ -90,9 +102,11 @@
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ttm.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ucode.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_uvd.c amdgpu
+file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_uvd_v4_2.c amdgpu & AMDGPU_CIK
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_uvd_v5_0.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_uvd_v6_0.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_vce.c amdgpu
+file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_vce_v2_0.c amdgpu & AMDGPU_CIK
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_vce_v3_0.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_vi.c amdgpu
file external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_vm.c amdgpu
diff -r f2f6bea8c954 -r 86bb6371f9bc sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu.h
--- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu.h Mon Aug 27 14:20:41 2018 +0000
+++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu.h Mon Aug 27 14:22:31 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: amdgpu.h,v 1.3 2018/08/27 14:04:50 riastradh Exp $ */
+/* $NetBSD: amdgpu.h,v 1.4 2018/08/27 14:22:31 riastradh Exp $ */
/*
* Copyright 2008 Advanced Micro Devices, Inc.
@@ -30,6 +30,14 @@
#ifndef __AMDGPU_H__
#define __AMDGPU_H__
+#ifdef _KERNEL_OPT
+#include "opt_amdgpu_cik.h"
+#endif
+
+#ifdef AMDGPU_CIK
+#define CONFIG_DRM_AMDGPU_CIK 1
+#endif
+
#include <linux/atomic.h>
#include <linux/wait.h>
#include <linux/list.h>
diff -r f2f6bea8c954 -r 86bb6371f9bc sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ci_dpm.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_ci_dpm.c Mon Aug 27 14:22:31 2018 +0000
@@ -0,0 +1,6716 @@
+/* $NetBSD: amdgpu_ci_dpm.c,v 1.1 2018/08/27 14:22:31 riastradh Exp $ */
+
+/*
+ * Copyright 2013 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_ci_dpm.c,v 1.1 2018/08/27 14:22:31 riastradh Exp $");
+
+#include <linux/firmware.h>
+#include "drmP.h"
+#include "amdgpu.h"
+#include "amdgpu_pm.h"
+#include "amdgpu_ucode.h"
+#include "cikd.h"
+#include "amdgpu_dpm.h"
+#include "ci_dpm.h"
+#include "gfx_v7_0.h"
+#include "atom.h"
+#include <linux/seq_file.h>
+
+#include "smu/smu_7_0_1_d.h"
+#include "smu/smu_7_0_1_sh_mask.h"
+
+#include "dce/dce_8_0_d.h"
+#include "dce/dce_8_0_sh_mask.h"
+
+#include "bif/bif_4_1_d.h"
+#include "bif/bif_4_1_sh_mask.h"
+
+#include "gca/gfx_7_2_d.h"
+#include "gca/gfx_7_2_sh_mask.h"
+
+#include "gmc/gmc_7_1_d.h"
+#include "gmc/gmc_7_1_sh_mask.h"
+
+MODULE_FIRMWARE("radeon/bonaire_smc.bin");
+MODULE_FIRMWARE("radeon/hawaii_smc.bin");
+
+#define MC_CG_ARB_FREQ_F0 0x0a
+#define MC_CG_ARB_FREQ_F1 0x0b
+#define MC_CG_ARB_FREQ_F2 0x0c
+#define MC_CG_ARB_FREQ_F3 0x0d
+
+#define SMC_RAM_END 0x40000
+
+#define VOLTAGE_SCALE 4
+#define VOLTAGE_VID_OFFSET_SCALE1 625
+#define VOLTAGE_VID_OFFSET_SCALE2 100
+
+static const struct ci_pt_defaults defaults_hawaii_xt =
+{
+ 1, 0xF, 0xFD, 0x19, 5, 0x14, 0, 0xB0000,
+ { 0x2E, 0x00, 0x00, 0x88, 0x00, 0x00, 0x72, 0x60, 0x51, 0xA7, 0x79, 0x6B, 0x90, 0xBD, 0x79 },
+ { 0x217, 0x217, 0x217, 0x242, 0x242, 0x242, 0x269, 0x269, 0x269, 0x2A1, 0x2A1, 0x2A1, 0x2C9, 0x2C9, 0x2C9 }
+};
+
+static const struct ci_pt_defaults defaults_hawaii_pro =
+{
+ 1, 0xF, 0xFD, 0x19, 5, 0x14, 0, 0x65062,
+ { 0x2E, 0x00, 0x00, 0x88, 0x00, 0x00, 0x72, 0x60, 0x51, 0xA7, 0x79, 0x6B, 0x90, 0xBD, 0x79 },
+ { 0x217, 0x217, 0x217, 0x242, 0x242, 0x242, 0x269, 0x269, 0x269, 0x2A1, 0x2A1, 0x2A1, 0x2C9, 0x2C9, 0x2C9 }
+};
+
+static const struct ci_pt_defaults defaults_bonaire_xt =
+{
+ 1, 0xF, 0xFD, 0x19, 5, 45, 0, 0xB0000,
+ { 0x79, 0x253, 0x25D, 0xAE, 0x72, 0x80, 0x83, 0x86, 0x6F, 0xC8, 0xC9, 0xC9, 0x2F, 0x4D, 0x61 },
+ { 0x17C, 0x172, 0x180, 0x1BC, 0x1B3, 0x1BD, 0x206, 0x200, 0x203, 0x25D, 0x25A, 0x255, 0x2C3, 0x2C5, 0x2B4 }
+};
+
+static const struct ci_pt_defaults defaults_bonaire_pro =
+{
+ 1, 0xF, 0xFD, 0x19, 5, 45, 0, 0x65062,
+ { 0x8C, 0x23F, 0x244, 0xA6, 0x83, 0x85, 0x86, 0x86, 0x83, 0xDB, 0xDB, 0xDA, 0x67, 0x60, 0x5F },
+ { 0x187, 0x193, 0x193, 0x1C7, 0x1D1, 0x1D1, 0x210, 0x219, 0x219, 0x266, 0x26C, 0x26C, 0x2C9, 0x2CB, 0x2CB }
+};
+
+static const struct ci_pt_defaults defaults_saturn_xt =
+{
+ 1, 0xF, 0xFD, 0x19, 5, 55, 0, 0x70000,
+ { 0x8C, 0x247, 0x249, 0xA6, 0x80, 0x81, 0x8B, 0x89, 0x86, 0xC9, 0xCA, 0xC9, 0x4D, 0x4D, 0x4D },
+ { 0x187, 0x187, 0x187, 0x1C7, 0x1C7, 0x1C7, 0x210, 0x210, 0x210, 0x266, 0x266, 0x266, 0x2C9, 0x2C9, 0x2C9 }
+};
+
+static const struct ci_pt_defaults defaults_saturn_pro =
+{
+ 1, 0xF, 0xFD, 0x19, 5, 55, 0, 0x30000,
+ { 0x96, 0x21D, 0x23B, 0xA1, 0x85, 0x87, 0x83, 0x84, 0x81, 0xE6, 0xE6, 0xE6, 0x71, 0x6A, 0x6A },
+ { 0x193, 0x19E, 0x19E, 0x1D2, 0x1DC, 0x1DC, 0x21A, 0x223, 0x223, 0x26E, 0x27E, 0x274, 0x2CF, 0x2D2, 0x2D2 }
+};
+
+static const struct ci_pt_config_reg didt_config_ci[] =
+{
+ { 0x10, 0x000000ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x10, 0x0000ff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x10, 0x00ff0000, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x10, 0xff000000, 24, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x11, 0x000000ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x11, 0x0000ff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x11, 0x00ff0000, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x11, 0xff000000, 24, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x12, 0x000000ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x12, 0x0000ff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x12, 0x00ff0000, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x12, 0xff000000, 24, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x2, 0x00003fff, 0, 0x4, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x2, 0x03ff0000, 16, 0x80, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x2, 0x78000000, 27, 0x3, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x1, 0x0000ffff, 0, 0x3FFF, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x1, 0xffff0000, 16, 0x3FFF, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x0, 0x00000001, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x30, 0x000000ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x30, 0x0000ff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x30, 0x00ff0000, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x30, 0xff000000, 24, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x31, 0x000000ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x31, 0x0000ff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x31, 0x00ff0000, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x31, 0xff000000, 24, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x32, 0x000000ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x32, 0x0000ff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x32, 0x00ff0000, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x32, 0xff000000, 24, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x22, 0x00003fff, 0, 0x4, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x22, 0x03ff0000, 16, 0x80, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x22, 0x78000000, 27, 0x3, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x21, 0x0000ffff, 0, 0x3FFF, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x21, 0xffff0000, 16, 0x3FFF, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x20, 0x00000001, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x50, 0x000000ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x50, 0x0000ff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x50, 0x00ff0000, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x50, 0xff000000, 24, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x51, 0x000000ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x51, 0x0000ff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x51, 0x00ff0000, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x51, 0xff000000, 24, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x52, 0x000000ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x52, 0x0000ff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x52, 0x00ff0000, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x52, 0xff000000, 24, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x42, 0x00003fff, 0, 0x4, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x42, 0x03ff0000, 16, 0x80, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x42, 0x78000000, 27, 0x3, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x41, 0x0000ffff, 0, 0x3FFF, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x41, 0xffff0000, 16, 0x3FFF, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x40, 0x00000001, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x70, 0x000000ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x70, 0x0000ff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x70, 0x00ff0000, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x70, 0xff000000, 24, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x71, 0x000000ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x71, 0x0000ff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x71, 0x00ff0000, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x71, 0xff000000, 24, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x72, 0x000000ff, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x72, 0x0000ff00, 8, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x72, 0x00ff0000, 16, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x72, 0xff000000, 24, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x62, 0x00003fff, 0, 0x4, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x62, 0x03ff0000, 16, 0x80, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x62, 0x78000000, 27, 0x3, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x61, 0x0000ffff, 0, 0x3FFF, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x61, 0xffff0000, 16, 0x3FFF, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0x60, 0x00000001, 0, 0x0, CISLANDS_CONFIGREG_DIDT_IND },
+ { 0xFFFFFFFF }
+};
+
+static u8 ci_get_memory_module_index(struct amdgpu_device *adev)
+{
+ return (u8) ((RREG32(mmBIOS_SCRATCH_4) >> 16) & 0xff);
+}
+
+#define MC_CG_ARB_FREQ_F0 0x0a
+#define MC_CG_ARB_FREQ_F1 0x0b
+#define MC_CG_ARB_FREQ_F2 0x0c
+#define MC_CG_ARB_FREQ_F3 0x0d
+
+static int ci_copy_and_switch_arb_sets(struct amdgpu_device *adev,
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