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[src/trunk]: src/sys/arch/macppc support OpenPIC variant found in PowerMac G5s
details: https://anonhg.NetBSD.org/src/rev/48c1c5b22575
branches: trunk
changeset: 786178:48c1c5b22575
user: macallan <macallan%NetBSD.org@localhost>
date: Thu Apr 18 16:42:46 2013 +0000
description:
support OpenPIC variant found in PowerMac G5s
from Phileas Fogg
diffstat:
sys/arch/macppc/conf/files.macppc | 9 +-
sys/arch/macppc/include/intr.h | 3 +-
sys/arch/macppc/macppc/interrupts.c | 9 +-
sys/arch/macppc/macppc/pic_u3_ht.c | 522 ++++++++++++++++++++++++++++++++++++
4 files changed, 537 insertions(+), 6 deletions(-)
diffs (truncated from 624 to 300 lines):
diff -r 981281cc4727 -r 48c1c5b22575 sys/arch/macppc/conf/files.macppc
--- a/sys/arch/macppc/conf/files.macppc Thu Apr 18 16:25:55 2013 +0000
+++ b/sys/arch/macppc/conf/files.macppc Thu Apr 18 16:42:46 2013 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.macppc,v 1.99 2012/01/24 04:33:11 macallan Exp $
+# $NetBSD: files.macppc,v 1.100 2013/04/18 16:42:46 macallan Exp $
#
# macppc-specific configuration info
@@ -25,13 +25,16 @@
# interrupt controllers
define pic_ohare
define pic_heathrow
+define pic_u3_ht
defflag opt_interrupt.h PIC_OHARE: pic_ohare
defflag opt_interrupt.h OHARE_DEBUG
defflag opt_interrupt.h PIC_HEATHROW: pic_heathrow
+defflag opt_interrupt.h PIC_U3_HT: pic_u3_ht
file arch/macppc/macppc/pic_ohare.c pic_ohare needs-flag
file arch/macppc/macppc/pic_heathrow.c pic_heathrow needs-flag
+file arch/macppc/macppc/pic_u3_ht.c pic_u3_ht needs-flag
# IPI interface
define ipi_hammerhead
@@ -108,7 +111,7 @@
attach grackle at mainbus
file arch/macppc/pci/grackle.c grackle
-device uninorth: pcibus, pic_openpic, ipi_openpic
+device uninorth: pcibus, pic_openpic, ipi_openpic, pic_u3_ht
attach uninorth at mainbus
file arch/macppc/pci/uninorth.c uninorth
@@ -121,7 +124,7 @@
include "dev/usb/files.usb"
include "dev/bluetooth/files.bluetooth"
-device ibmcpc: pcibus, pic_openpic, ipi_openpic
+device ibmcpc: pcibus, pic_openpic, ipi_openpic, pic_u3_ht
attach ibmcpc at mainbus
file arch/macppc/pci/u3.c ibmcpc
diff -r 981281cc4727 -r 48c1c5b22575 sys/arch/macppc/include/intr.h
--- a/sys/arch/macppc/include/intr.h Thu Apr 18 16:25:55 2013 +0000
+++ b/sys/arch/macppc/include/intr.h Thu Apr 18 16:42:46 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.30 2011/06/17 23:36:17 matt Exp $ */
+/* $NetBSD: intr.h,v 1.31 2013/04/18 16:42:46 macallan Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -52,6 +52,7 @@
/* probe for a PIC and set it up, return TRUE on success */
int init_ohare(void);
int init_heathrow(void);
+int init_u3_ht(void);
int init_grandcentral(void);
void setup_hammerhead_ipi(void);
#endif
diff -r 981281cc4727 -r 48c1c5b22575 sys/arch/macppc/macppc/interrupts.c
--- a/sys/arch/macppc/macppc/interrupts.c Thu Apr 18 16:25:55 2013 +0000
+++ b/sys/arch/macppc/macppc/interrupts.c Thu Apr 18 16:42:46 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: interrupts.c,v 1.4 2010/11/14 03:57:17 uebayasi Exp $ */
+/* $NetBSD: interrupts.c,v 1.5 2013/04/18 16:42:46 macallan Exp $ */
/*-
* Copyright (c) 2007 Michael Lorenz
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: interrupts.c,v 1.4 2010/11/14 03:57:17 uebayasi Exp $");
+__KERNEL_RCSID(0, "$NetBSD: interrupts.c,v 1.5 2013/04/18 16:42:46 macallan Exp $");
#include "opt_multiprocessor.h"
@@ -47,6 +47,7 @@
#include "pic_openpic.h"
#include "pic_ohare.h"
#include "pic_heathrow.h"
+#include "pic_u3_ht.h"
#include "opt_ipi.h"
#include "ipi_openpic.h"
#include "ipi_hammerhead.h"
@@ -119,6 +120,10 @@
if (init_heathrow())
goto done;
#endif
+#if NPIC_U3_HT > 0
+ if (init_u3_ht())
+ goto done;
+#endif
#if NPIC_OPENPIC > 0
if (init_openpic(0))
goto done;
diff -r 981281cc4727 -r 48c1c5b22575 sys/arch/macppc/macppc/pic_u3_ht.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/macppc/macppc/pic_u3_ht.c Thu Apr 18 16:42:46 2013 +0000
@@ -0,0 +1,522 @@
+/*-
+ * Copyright (c) 2013 Phileas Fogg
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+
+#include "opt_openpic.h"
+#include "opt_interrupt.h"
+
+#include <sys/param.h>
+#include <sys/kmem.h>
+#include <sys/kernel.h>
+
+#include <machine/pio.h>
+#include <powerpc/openpic.h>
+
+#include <dev/ofw/openfirm.h>
+#include <dev/ofw/ofw_pci.h>
+#include <dev/pci/pcireg.h>
+
+#include <machine/autoconf.h>
+#include <arch/powerpc/pic/picvar.h>
+
+struct u3_ht_irqmap {
+ int im_index;
+ int im_level;
+ volatile uint8_t *im_base;
+ volatile uint8_t *im_apple_base;
+ uint32_t im_data;
+};
+
+struct u3_ht_ops {
+ struct pic_ops pic;
+
+ volatile uint8_t *ht_base;
+
+ struct u3_ht_irqmap ht_irqmap[128];
+
+ uint32_t (*ht_read)(struct u3_ht_ops *, u_int);
+ void (*ht_write)(struct u3_ht_ops *, u_int, uint32_t);
+};
+
+#define u3_ht_read(ptr,reg) (ptr)->ht_read(ptr, reg)
+#define u3_ht_write(ptr,reg,val) (ptr)->ht_write(ptr, reg, val)
+
+static struct u3_ht_ops *setup_u3_ht(uint32_t, uint32_t, int);
+static int setup_u3_ht_workarounds(struct u3_ht_ops *);
+
+static void u3_ht_enable_irq(struct pic_ops *, int, int);
+static void u3_ht_disable_irq(struct pic_ops *, int);
+static int u3_ht_get_irq(struct pic_ops *, int);
+static void u3_ht_ack_irq(struct pic_ops *, int);
+static void u3_ht_establish_irq(struct pic_ops *, int, int, int);
+static void u3_ht_finish_setup(struct pic_ops *);
+
+static int u3_ht_is_ht_irq(struct u3_ht_ops *, int);
+static void u3_ht_establish_ht_irq(struct u3_ht_ops *, int, int);
+static void u3_ht_enable_ht_irq(struct u3_ht_ops *, int);
+static void u3_ht_ack_ht_irq(struct u3_ht_ops *, int);
+
+static void u3_ht_set_priority(struct u3_ht_ops *, int, int);
+static int u3_ht_read_irq(struct u3_ht_ops *, int);
+static void u3_ht_eoi(struct u3_ht_ops *, int);
+
+static uint32_t u3_ht_read_be(struct u3_ht_ops *, u_int);
+static void u3_ht_write_be(struct u3_ht_ops *, u_int, uint32_t);
+static uint32_t u3_ht_read_le(struct u3_ht_ops *, u_int);
+static void u3_ht_write_le(struct u3_ht_ops *, u_int, uint32_t);
+
+static const char *u3_compat[] = {
+ "u3",
+ NULL
+};
+
+const char *pic_compat[] = {
+ "chrp,open-pic",
+ "open-pic",
+ "openpic",
+ NULL
+};
+
+int init_u3_ht(void)
+{
+ int u4, pic;
+ uint32_t reg[2];
+ uint32_t base, len, tmp;
+ int bigendian;
+ volatile uint8_t *unin_reg;
+
+ u4 = OF_finddevice("/u4");
+ if (u4 == -1)
+ return FALSE;
+
+ if (of_compatible(u4, u3_compat) == -1)
+ return FALSE;
+
+ pic = OF_child(u4);
+ while ((pic != 0) && (of_compatible(pic, pic_compat) == -1))
+ pic = OF_peer(pic);
+
+ if ((pic == -1) || (pic == 0))
+ return FALSE;
+
+ if (OF_getprop(u4, "reg", reg, sizeof(reg)) != 8)
+ return FALSE;
+
+ base = reg[1];
+
+ /* Enable and reset PIC */
+
+ unin_reg = mapiodev(base, PAGE_SIZE, false);
+ KASSERT(unin_reg != NULL);
+ tmp = in32(unin_reg + 0xe0);
+ tmp |= 0x06;
+ out32(unin_reg + 0xe0, tmp);
+
+ bigendian = 0;
+ if (OF_getprop(pic, "big-endian", reg, 4) > -1)
+ bigendian = 1;
+
+ if (OF_getprop(pic, "reg", reg, 8) != 8)
+ return FALSE;
+
+ base = reg[0];
+ len = reg[1];
+
+ aprint_normal("found U3/U4 HT PIC at %08x\n", base);
+
+ setup_u3_ht(base, len, bigendian);
+
+ return TRUE;
+}
+
+static struct u3_ht_ops *
+setup_u3_ht(uint32_t addr, uint32_t len, int bigendian)
+{
+ struct u3_ht_ops *u3_ht;
+ struct pic_ops *pic;
+ int irq;
+ u_int x;
+
+ u3_ht = kmem_alloc(sizeof(struct u3_ht_ops), KM_SLEEP);
+ KASSERT(u3_ht != NULL);
+ bzero(u3_ht, sizeof(struct u3_ht_ops));
+ pic = &u3_ht->pic;
+
+ u3_ht->ht_base = mapiodev(addr, len, false);
+ KASSERT(u3_ht->ht_base != NULL);
+
+ if (bigendian) {
+ u3_ht->ht_read = u3_ht_read_be;
+ u3_ht->ht_write = u3_ht_write_be;
+ } else {
+ u3_ht->ht_read = u3_ht_read_le;
+ u3_ht->ht_write = u3_ht_write_le;
+ }
+
+ setup_u3_ht_workarounds(u3_ht);
+
+ /* Reset PIC */
+
+ x = u3_ht_read(u3_ht, OPENPIC_CONFIG);
+ u3_ht_write(u3_ht, OPENPIC_CONFIG, x | OPENPIC_CONFIG_RESET);
+ do {
+ x = u3_ht_read(u3_ht, OPENPIC_CONFIG);
+ } while (x & OPENPIC_CONFIG_RESET);
+
+ x = u3_ht_read(u3_ht, OPENPIC_FEATURE);
+
+ aprint_normal("OpenPIC Version 1.%d: "
+ "Supports %d CPUs and %d interrupt sources.\n",
+ x & 0xff, ((x & 0x1f00) >> 8) + 1, ((x & 0x07ff0000) >> 16) + 1);
+
+ pic->pic_numintrs = ((x & 0x07ff0000) >> 16) + 1;
+ pic->pic_cookie = (void *) addr;
+ pic->pic_enable_irq = u3_ht_enable_irq;
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