Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/arch/atari/pci Explicitly setup the secondary IDE interr...



details:   https://anonhg.NetBSD.org/src/rev/0bf8cf511f76
branches:  trunk
changeset: 829435:0bf8cf511f76
user:      tsutsui <tsutsui%NetBSD.org@localhost>
date:      Wed Jan 31 15:36:29 2018 +0000

description:
Explicitly setup the secondary IDE interrupt of PIIX on Milan.

The secondary IDE interrupt is connected to MBIRQ0 on PIIX, but
the Milan's ROM bootloader (at least version 0.99.7) doesn't seem
to setup the MBIRQ0 register to route it to IRQ15.

diffstat:

 sys/arch/atari/pci/pci_machdep.c |  18 ++++++++++++++++--
 1 files changed, 16 insertions(+), 2 deletions(-)

diffs (46 lines):

diff -r 52aed945ba5f -r 0bf8cf511f76 sys/arch/atari/pci/pci_machdep.c
--- a/sys/arch/atari/pci/pci_machdep.c  Wed Jan 31 15:23:08 2018 +0000
+++ b/sys/arch/atari/pci/pci_machdep.c  Wed Jan 31 15:36:29 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pci_machdep.c,v 1.54 2014/03/29 19:28:26 christos Exp $        */
+/*     $NetBSD: pci_machdep.c,v 1.55 2018/01/31 15:36:29 tsutsui Exp $ */
 
 /*
  * Copyright (c) 1996 Leo Weppelman.  All rights reserved.
@@ -32,7 +32,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.54 2014/03/29 19:28:26 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.55 2018/01/31 15:36:29 tsutsui Exp $");
 
 #include "opt_mbtype.h"
 
@@ -49,6 +49,7 @@
 
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcireg.h>
+#include <dev/pci/pcidevs.h>
 
 #include <uvm/uvm_extern.h>
 
@@ -449,6 +450,19 @@
        /*
         * On the Milan, we accept the BIOS's choice.
         */
+       /* ..except the secondary IDE interrupt that the BIOS doesn't setup. */
+#define PIIX_PCIB_MBIRQ0       0x70
+       if ((PCI_VENDOR(id) == PCI_VENDOR_INTEL) &&
+           (PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_82371FB_ISA)) {
+               /* Set Interrupt Routing for MBIRQ0 to IRQ15 */
+               csr = pci_conf_read(pc, tag, PIIX_PCIB_MBIRQ0);
+               csr &= ~0x00000ff;
+               csr |=  0x000000f;      /* IRQ15 */
+               pci_conf_write(pc, tag, PIIX_PCIB_MBIRQ0, csr);
+#ifdef DEBUG_PCI_MACHDEP
+               printf("\npcib0: enable and route MBIRQ0 to irq 15\n");
+#endif
+       }
 #endif
     }
 



Home | Main Index | Thread Index | Old Index