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[src/trunk]: src/sys/dev Cleanup flag setting. No functional change.
details: https://anonhg.NetBSD.org/src/rev/91bfa66eeffc
branches: trunk
changeset: 791016:91bfa66eeffc
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Thu Oct 31 04:26:40 2013 +0000
description:
Cleanup flag setting. No functional change.
- Split flags into bge_flags and bge_phy_flags.
- Rename flags. PHY related flags are prefixed with BGEPHYF_*.
Other flags are prefixed with BGEF_*.
diffstat:
sys/dev/mii/brgphy.c | 22 ++--
sys/dev/pci/if_bge.c | 230 ++++++++++++++++++++++++-----------------------
sys/dev/pci/if_bgereg.h | 69 +++++++------
sys/dev/pci/if_bgevar.h | 3 +-
4 files changed, 166 insertions(+), 158 deletions(-)
diffs (truncated from 912 to 300 lines):
diff -r 983fc26233e8 -r 91bfa66eeffc sys/dev/mii/brgphy.c
--- a/sys/dev/mii/brgphy.c Thu Oct 31 01:55:03 2013 +0000
+++ b/sys/dev/mii/brgphy.c Thu Oct 31 04:26:40 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: brgphy.c,v 1.67 2013/06/21 04:25:51 msaitoh Exp $ */
+/* $NetBSD: brgphy.c,v 1.68 2013/10/31 04:26:40 msaitoh Exp $ */
/*-
* Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.67 2013/06/21 04:25:51 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.68 2013/10/31 04:26:40 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -711,19 +711,19 @@
if (bsc->sc_isbge) {
if (!(sc->mii_flags & MIIF_HAVEFIBER)) {
- if (bsc->sc_phyflags & BGE_PHY_ADC_BUG)
+ if (bsc->sc_phyflags & BGEPHYF_ADC_BUG)
brgphy_adc_bug(sc);
- if (bsc->sc_phyflags & BGE_PHY_5704_A0_BUG)
+ if (bsc->sc_phyflags & BGEPHYF_5704_A0_BUG)
brgphy_5704_a0_bug(sc);
- if (bsc->sc_phyflags & BGE_PHY_BER_BUG)
+ if (bsc->sc_phyflags & BGEPHYF_BER_BUG)
brgphy_ber_bug(sc);
- else if (bsc->sc_phyflags & BGE_PHY_JITTER_BUG) {
+ else if (bsc->sc_phyflags & BGEPHYF_JITTER_BUG) {
PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0c00);
PHY_WRITE(sc, BRGPHY_MII_DSP_ADDR_REG,
0x000a);
if (bsc->sc_phyflags
- & BGE_PHY_ADJUST_TRIM) {
+ & BGEPHYF_ADJUST_TRIM) {
PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT,
0x110b);
PHY_WRITE(sc, BRGPHY_TEST1,
@@ -735,11 +735,11 @@
PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0400);
}
- if (bsc->sc_phyflags & BGE_PHY_CRC_BUG)
+ if (bsc->sc_phyflags & BGEPHYF_CRC_BUG)
brgphy_crc_bug(sc);
/* Set Jumbo frame settings in the PHY. */
- if (bsc->sc_phyflags & BGE_JUMBO_CAPABLE)
+ if (bsc->sc_phyflags & BGEPHYF_JUMBO_CAPABLE)
brgphy_jumbo_settings(sc);
/* Adjust output voltage */
@@ -748,12 +748,12 @@
PHY_WRITE(sc, BRGPHY_MII_EPHY_PTEST, 0x12);
/* Enable Ethernet@Wirespeed */
- if (!(bsc->sc_phyflags & BGE_PHY_NO_WIRESPEED))
+ if (!(bsc->sc_phyflags & BGEPHYF_NO_WIRESPEED))
brgphy_eth_wirespeed(sc);
#if 0
/* Enable Link LED on Dell boxes */
- if (bsc->sc_phyflags & BGE_PHY_NO_3LED) {
+ if (bsc->sc_phyflags & BGEPHYF_NO_3LED) {
PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL)
& ~BRGPHY_PHY_EXTCTL_3_LED);
diff -r 983fc26233e8 -r 91bfa66eeffc sys/dev/pci/if_bge.c
--- a/sys/dev/pci/if_bge.c Thu Oct 31 01:55:03 2013 +0000
+++ b/sys/dev/pci/if_bge.c Thu Oct 31 04:26:40 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bge.c,v 1.260 2013/10/28 05:37:24 msaitoh Exp $ */
+/* $NetBSD: if_bge.c,v 1.261 2013/10/31 04:26:40 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.260 2013/10/28 05:37:24 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.261 2013/10/31 04:26:40 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -671,15 +671,15 @@
NULL },
};
-#define BGE_IS_JUMBO_CAPABLE(sc) ((sc)->bge_flags & BGE_JUMBO_CAPABLE)
-#define BGE_IS_5700_FAMILY(sc) ((sc)->bge_flags & BGE_5700_FAMILY)
-#define BGE_IS_5705_PLUS(sc) ((sc)->bge_flags & BGE_5705_PLUS)
-#define BGE_IS_5714_FAMILY(sc) ((sc)->bge_flags & BGE_5714_FAMILY)
-#define BGE_IS_575X_PLUS(sc) ((sc)->bge_flags & BGE_575X_PLUS)
-#define BGE_IS_5755_PLUS(sc) ((sc)->bge_flags & BGE_5755_PLUS)
-#define BGE_IS_57765_FAMILY(sc) ((sc)->bge_flags & BGE_57765_FAMILY)
-#define BGE_IS_57765_PLUS(sc) ((sc)->bge_flags & BGE_57765_PLUS)
-#define BGE_IS_5717_PLUS(sc) ((sc)->bge_flags & BGE_5717_PLUS)
+#define BGE_IS_JUMBO_CAPABLE(sc) ((sc)->bge_flags & BGEF_JUMBO_CAPABLE)
+#define BGE_IS_5700_FAMILY(sc) ((sc)->bge_flags & BGEF_5700_FAMILY)
+#define BGE_IS_5705_PLUS(sc) ((sc)->bge_flags & BGEF_5705_PLUS)
+#define BGE_IS_5714_FAMILY(sc) ((sc)->bge_flags & BGEF_5714_FAMILY)
+#define BGE_IS_575X_PLUS(sc) ((sc)->bge_flags & BGEF_575X_PLUS)
+#define BGE_IS_5755_PLUS(sc) ((sc)->bge_flags & BGEF_5755_PLUS)
+#define BGE_IS_57765_FAMILY(sc) ((sc)->bge_flags & BGEF_57765_FAMILY)
+#define BGE_IS_57765_PLUS(sc) ((sc)->bge_flags & BGEF_57765_PLUS)
+#define BGE_IS_5717_PLUS(sc) ((sc)->bge_flags & BGEF_5717_PLUS)
static const struct bge_revision {
uint32_t br_chipid;
@@ -1741,7 +1741,7 @@
m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
m_new->m_data = m_new->m_ext.ext_buf;
}
- if (!(sc->bge_flags & BGE_RX_ALIGNBUG))
+ if (!(sc->bge_flags & BGEF_RX_ALIGNBUG))
m_adj(m_new, ETHER_ALIGN);
if (bus_dmamap_load_mbuf(sc->bge_dmatag, dmamap, m_new,
BUS_DMA_READ|BUS_DMA_NOWAIT))
@@ -1802,7 +1802,7 @@
buf = m_new->m_data = m_new->m_ext.ext_buf;
m_new->m_ext.ext_size = BGE_JUMBO_FRAMELEN;
}
- if (!(sc->bge_flags & BGE_RX_ALIGNBUG))
+ if (!(sc->bge_flags & BGEF_RX_ALIGNBUG))
m_adj(m_new, ETHER_ALIGN);
bus_dmamap_sync(sc->bge_dmatag, sc->bge_cdata.bge_rx_jumbo_map,
mtod(m_new, char *) - (char *)sc->bge_cdata.bge_jumbo_buf, BGE_JLEN,
@@ -1835,7 +1835,7 @@
{
int i;
- if (sc->bge_flags & BGE_RXRING_VALID)
+ if (sc->bge_flags & BGEF_RXRING_VALID)
return 0;
for (i = 0; i < BGE_SSLOTS; i++) {
@@ -1846,7 +1846,7 @@
sc->bge_std = i - 1;
bge_writembx(sc, BGE_MBX_RX_STD_PROD_LO, sc->bge_std);
- sc->bge_flags |= BGE_RXRING_VALID;
+ sc->bge_flags |= BGEF_RXRING_VALID;
return 0;
}
@@ -1856,7 +1856,7 @@
{
int i;
- if (!(sc->bge_flags & BGE_RXRING_VALID))
+ if (!(sc->bge_flags & BGEF_RXRING_VALID))
return;
for (i = 0; i < BGE_STD_RX_RING_CNT; i++) {
@@ -1870,7 +1870,7 @@
sizeof(struct bge_rx_bd));
}
- sc->bge_flags &= ~BGE_RXRING_VALID;
+ sc->bge_flags &= ~BGEF_RXRING_VALID;
}
static int
@@ -1879,7 +1879,7 @@
int i;
volatile struct bge_rcb *rcb;
- if (sc->bge_flags & BGE_JUMBO_RXRING_VALID)
+ if (sc->bge_flags & BGEF_JUMBO_RXRING_VALID)
return 0;
for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) {
@@ -1888,7 +1888,7 @@
}
sc->bge_jumbo = i - 1;
- sc->bge_flags |= BGE_JUMBO_RXRING_VALID;
+ sc->bge_flags |= BGEF_JUMBO_RXRING_VALID;
rcb = &sc->bge_rdata->bge_info.bge_jumbo_rx_rcb;
rcb->bge_maxlen_flags = 0;
@@ -1904,7 +1904,7 @@
{
int i;
- if (!(sc->bge_flags & BGE_JUMBO_RXRING_VALID))
+ if (!(sc->bge_flags & BGEF_JUMBO_RXRING_VALID))
return;
for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) {
@@ -1916,7 +1916,7 @@
sizeof(struct bge_rx_bd));
}
- sc->bge_flags &= ~BGE_JUMBO_RXRING_VALID;
+ sc->bge_flags &= ~BGEF_JUMBO_RXRING_VALID;
}
static void
@@ -1925,7 +1925,7 @@
int i;
struct txdmamap_pool_entry *dma;
- if (!(sc->bge_flags & BGE_TXRING_VALID))
+ if (!(sc->bge_flags & BGEF_TXRING_VALID))
return;
for (i = 0; i < BGE_TX_RING_CNT; i++) {
@@ -1946,7 +1946,7 @@
free(dma, M_DEVBUF);
}
- sc->bge_flags &= ~BGE_TXRING_VALID;
+ sc->bge_flags &= ~BGEF_TXRING_VALID;
}
static int
@@ -1958,7 +1958,7 @@
bus_size_t maxsegsz;
struct txdmamap_pool_entry *dma;
- if (sc->bge_flags & BGE_TXRING_VALID)
+ if (sc->bge_flags & BGEF_TXRING_VALID)
return 0;
sc->bge_txcnt = 0;
@@ -2004,7 +2004,7 @@
SLIST_INSERT_HEAD(&sc->txdma_list, dma, link);
}
- sc->bge_flags |= BGE_TXRING_VALID;
+ sc->bge_flags |= BGEF_TXRING_VALID;
return 0;
}
@@ -2176,7 +2176,7 @@
aprint_error_dev(sc->bge_dev, "reset timed out\n");
return -1;
}
- } else if ((sc->bge_flags & BGE_NO_EEPROM) == 0) {
+ } else if ((sc->bge_flags & BGEF_NO_EEPROM) == 0) {
/*
* Poll the value location we just wrote until
* we see the 1's complement of the magic number.
@@ -2347,7 +2347,7 @@
/* Set up the PCI DMA control register. */
dma_rw_ctl = BGE_PCI_READ_CMD | BGE_PCI_WRITE_CMD;
- if (sc->bge_flags & BGE_PCIE) {
+ if (sc->bge_flags & BGEF_PCIE) {
/* Read watermark not used, 128 bytes for write. */
DPRINTFN(4, ("(%s: PCI-Express DMA setting)\n",
device_xname(sc->bge_dev)));
@@ -2355,7 +2355,7 @@
dma_rw_ctl |= BGE_PCIDMARWCTL_WR_WAT_SHIFT(7);
else
dma_rw_ctl |= BGE_PCIDMARWCTL_WR_WAT_SHIFT(3);
- } else if (sc->bge_flags & BGE_PCIX) {
+ } else if (sc->bge_flags & BGEF_PCIX) {
DPRINTFN(4, ("(:%s: PCI-X DMA setting)\n",
device_xname(sc->bge_dev)));
/* PCI-X bus */
@@ -2977,9 +2977,9 @@
BGE_MACMODE_RX_STATS_ENB | BGE_MACMODE_TX_STATS_ENB |
BGE_MACMODE_FRMHDR_DMA_ENB;
- if (sc->bge_flags & BGE_PHY_FIBER_TBI)
+ if (sc->bge_flags & BGEF_FIBER_TBI)
val |= BGE_PORTMODE_TBI;
- else if (sc->bge_flags & BGE_PHY_FIBER_MII)
+ else if (sc->bge_flags & BGEF_FIBER_MII)
val |= BGE_PORTMODE_GMII;
else
val |= BGE_PORTMODE_MII;
@@ -3036,13 +3036,13 @@
BGE_RDMAMODE_MBUF_RBD_CRPT_ATTN |
BGE_RDMAMODE_MBUF_SBD_CRPT_ATTN;
- if (sc->bge_flags & BGE_PCIE)
+ if (sc->bge_flags & BGEF_PCIE)
val |= BGE_RDMAMODE_FIFO_LONG_BURST;
if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57766) {
if (ifp->if_mtu <= ETHERMTU)
val |= BGE_RDMAMODE_JMB_2K_MMRR;
}
- if (sc->bge_flags & BGE_TSO)
+ if (sc->bge_flags & BGEF_TSO)
val |= BGE_RDMAMODE_TSO4_ENABLE;
if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5720) {
@@ -3132,7 +3132,7 @@
/* 5718 step 60, 57XX step 90 */
/* Turn on send data initiator state machine */
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