[src/trunk]: src/sys/arch/arm/arm Make these compatible with thumb/thumb2

To: source-changes-hg%NetBSD.org@localhost
Subject: [src/trunk]: src/sys/arch/arm/arm Make these compatible with thumb/thumb2
From: matt <matt%NetBSD.org@localhost>
Date: Tue, 07 Apr 2020 01:28:22 +0000
details:   https://anonhg.NetBSD.org/src/rev/9ee9a8987d02
branches:  trunk
changeset: 790970:9ee9a8987d02
user:      matt <matt%NetBSD.org@localhost>
date:      Mon Oct 28 22:50:25 2013 +0000

description:
Make these compatible with thumb/thumb2

diffstat:

 sys/arch/arm/arm/bus_space_a2x.S         |   30 ++--
 sys/arch/arm/arm/bus_space_a4x.S         |   30 ++--
 sys/arch/arm/arm/bus_space_asm_generic.S |  203 ++++++++++++++----------------
 3 files changed, 123 insertions(+), 140 deletions(-)

diffs (truncated from 768 to 300 lines):

diff -r f415f4831b86 -r 9ee9a8987d02 sys/arch/arm/arm/bus_space_a2x.S
--- a/sys/arch/arm/arm/bus_space_a2x.S  Mon Oct 28 22:35:07 2013 +0000
+++ b/sys/arch/arm/arm/bus_space_a2x.S  Mon Oct 28 22:50:25 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: bus_space_a2x.S,v 1.3 2013/08/18 06:28:18 matt Exp $   */
+/*     $NetBSD: bus_space_a2x.S,v 1.4 2013/10/28 22:50:25 matt Exp $   */
 
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
 #include <arm/locore.h>
 #include <arm/byte_swap.h>
 
-RCSID("$NetBSD: bus_space_a2x.S,v 1.3 2013/08/18 06:28:18 matt Exp $")
+RCSID("$NetBSD: bus_space_a2x.S,v 1.4 2013/10/28 22:50:25 matt Exp $")
 
 /*
  * bus_space_read_[124](void *cookie, bus_space_handle_t handle,
@@ -47,13 +47,13 @@
 
 #if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
 ENTRY_NP(a2x_bs_r_2)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        ldrh    r0, [r1, r2]
        RET
 END(a2x_bs_r_2)
 
 ENTRY_NP(a2x_bs_r_2_swap)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        ldrh    r0, [r1, r2]
        BSWAP16(r0, r0, r1)
        RET
@@ -77,29 +77,29 @@
  */
 
 ENTRY_NP(a2x_bs_rm_1)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        b       generic_bs_rm_1
 END(a2x_bs_rm_1)
 
 #if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
 ENTRY_NP(a2x_bs_rm_2)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        b       generic_armv4_bs_rm_2
 END(a2x_bs_rm_2)
 
 ENTRY_NP(a2x_bs_rm_2_swap)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        b       generic_armv4_bs_rm_2_swap
 END(a2x_bs_rm_2_swap)
 #endif
 
 ENTRY_NP(a2x_bs_rm_4)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        b       generic_bs_rm_4
 END(a2x_bs_rm_4)
 
 ENTRY_NP(a2x_bs_rm_4_swap)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        b       generic_bs_rm_4_swap
 END(a2x_bs_rm_4_swap)
 
@@ -116,7 +116,7 @@
 ENTRY_NP(a2x_bs_w_2_swap)
        BSWAP16(r3, r3, r0)
 ENTRY_NP(a2x_bs_w_2)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        strh    r3, [r1, r2]
        RET
 END(a2x_bs_w_2)
@@ -137,28 +137,28 @@
  */
 
 ENTRY_NP(a2x_bs_wm_1)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        b       generic_bs_wm_1
 END(a2x_bs_wm_1)
 
 #if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
 ENTRY_NP(a2x_bs_wm_2)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        b       generic_armv4_bs_wm_2
 END(a2x_bs_wm_2)
 
 ENTRY_NP(a2x_bs_wm_2_swap)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        b       generic_armv4_bs_wm_2_swap
 END(a2x_bs_wm_2_swap)
 #endif
 
 ENTRY_NP(a2x_bs_wm_4)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        b       generic_bs_wm_4
 END(a2x_bs_wm_4)
 
 ENTRY_NP(a2x_bs_wm_4_swap)
-       lsl     r2, r2, #1
+       lsls    r2, r2, #1
        b       generic_bs_wm_4_swap
 END(a2x_bs_wm_4_swap)
diff -r f415f4831b86 -r 9ee9a8987d02 sys/arch/arm/arm/bus_space_a4x.S
--- a/sys/arch/arm/arm/bus_space_a4x.S  Mon Oct 28 22:35:07 2013 +0000
+++ b/sys/arch/arm/arm/bus_space_a4x.S  Mon Oct 28 22:50:25 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: bus_space_a4x.S,v 1.3 2013/08/18 06:28:18 matt Exp $   */
+/*     $NetBSD: bus_space_a4x.S,v 1.4 2013/10/28 22:50:25 matt Exp $   */
 
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
 #include <arm/locore.h>
 #include <arm/byte_swap.h>
 
-RCSID("$NetBSD: bus_space_a4x.S,v 1.3 2013/08/18 06:28:18 matt Exp $")
+RCSID("$NetBSD: bus_space_a4x.S,v 1.4 2013/10/28 22:50:25 matt Exp $")
 
 /*
  * bus_space_read_[124](void *cookie, bus_space_handle_t handle,
@@ -47,13 +47,13 @@
 
 #if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
 ENTRY_NP(a4x_bs_r_2)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        ldrh    r0, [r1, r2]
        RET
 END(a4x_bs_r_2)
 
 ENTRY_NP(a4x_bs_r_2_swap)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        ldrh    r0, [r1, r2]
        BSWAP16(r0, r0, r1)
        RET
@@ -77,29 +77,29 @@
  */
 
 ENTRY_NP(a4x_bs_rm_1)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        b       generic_bs_rm_1
 END(a4x_bs_rm_1)
 
 #if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
 ENTRY_NP(a4x_bs_rm_2)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        b       generic_armv4_bs_rm_2
 END(a4x_bs_rm_2)
 
 ENTRY_NP(a4x_bs_rm_2_swap)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        b       generic_armv4_bs_rm_2_swap
 END(a4x_bs_rm_2_swap)
 #endif
 
 ENTRY_NP(a4x_bs_rm_4)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        b       generic_bs_rm_4
 END(a4x_bs_rm_4)
 
 ENTRY_NP(a4x_bs_rm_4_swap)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        b       generic_bs_rm_4_swap
 END(a4x_bs_rm_4_swap)
 
@@ -116,7 +116,7 @@
 ENTRY_NP(a4x_bs_w_2_swap)
        BSWAP16(r3, r3, r0)
 ENTRY_NP(a4x_bs_w_2)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        strh    r3, [r1, r2]
        RET
 END(a4x_bs_w_2)
@@ -137,28 +137,28 @@
  */
 
 ENTRY_NP(a4x_bs_wm_1)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        b       generic_bs_wm_1
 END(a4x_bs_wm_1)
 
 #if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
 ENTRY_NP(a4x_bs_wm_2)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        b       generic_armv4_bs_wm_2
 END(a4x_bs_wm_2)
 
 ENTRY_NP(a4x_bs_wm_2_swap)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        b       generic_armv4_bs_wm_2_swap
 END(a4x_bs_wm_2_swap)
 #endif
 
 ENTRY_NP(a4x_bs_wm_4)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        b       generic_bs_wm_4
 END(a4x_bs_wm_4)
 
 ENTRY_NP(a4x_bs_wm_4_swap)
-       lsl     r2, r2, #2
+       lsls    r2, r2, #2
        b       generic_bs_wm_4_swap
 END(a4x_bs_wm_4_swap)
diff -r f415f4831b86 -r 9ee9a8987d02 sys/arch/arm/arm/bus_space_asm_generic.S
--- a/sys/arch/arm/arm/bus_space_asm_generic.S  Mon Oct 28 22:35:07 2013 +0000
+++ b/sys/arch/arm/arm/bus_space_asm_generic.S  Mon Oct 28 22:50:25 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: bus_space_asm_generic.S,v 1.10 2013/08/18 06:29:29 matt Exp $  */
+/*     $NetBSD: bus_space_asm_generic.S,v 1.11 2013/10/28 22:50:25 matt Exp $  */
 
 /*
  * Copyright (c) 1997 Causality Limited.
@@ -46,6 +46,13 @@
 #define        DSB
 #endif
 
+#if defined(__thumb__) && defined(_ARM_ARCH_T2)
+#define CHECK_LENGTH(r, l)     cbz r, l
+#elif defined(__thumb__)
+#define CHECK_LENGTH(r, l)     cmp r, #0; beq l
+#else
+#define CHECK_LENGTH(r, l)     cmp r, #0; RETc(eq)
+#endif
 /*
  * Generic bus_space functions.
  */
@@ -123,11 +130,10 @@
  */
 
 ENTRY_NP(generic_bs_rm_1)
-       add     r0, r1, r2
+       adds    r0, r1, r2
        mov     r1, r3
        ldr     r2, [sp, #0]
-       teq     r2, #0
-       RETc(eq)
+       CHECK_LENGTH(r2, 99f)
        DSB
 
 1:     ldrb    r3, [r0]
@@ -135,16 +141,15 @@
        subs    r2, r2, #1
        bne     1b
 
-       RET
+99:    RET
 END(generic_bs_rm_1)
 
 #if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
 ENTRY_NP(generic_armv4_bs_rm_2)
-       add     r0, r1, r2
+       adds    r0, r1, r2
        mov     r1, r3
        ldr     r2, [sp, #0]
-       teq     r2, #0
-       RETc(eq)
+       CHECK_LENGTH(r2, 99f)
        DSB
 
 1:     ldrh    r3, [r0]
@@ -152,16 +157,15 @@
        subs    r2, r2, #1
        bne     1b
 
-       RET
+99:    RET
 END(generic_armv4_bs_rm_2)
 
 ENTRY_NP(generic_armv4_bs_rm_2_swap)
        DSB
-       add     r0, r1, r2
+       adds    r0, r1, r2
        mov     r1, r3
        ldr     r2, [sp, #0]
-       teq     r2, #0
-       RETc(eq)
+       CHECK_LENGTH(r2, 99f)
        DSB
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