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[src/netbsd-8]: src/sys/dev/mii Pull up the following revisions, requested by...
details: https://anonhg.NetBSD.org/src/rev/bacf03e5da94
branches: netbsd-8
changeset: 852522:bacf03e5da94
user: martin <martin%NetBSD.org@localhost>
date: Sun Sep 01 10:19:04 2019 +0000
description:
Pull up the following revisions, requested by msaitoh in ticket #1350:
sys/dev/mii/ciphy.c 1.27-1.28, 1.30, 1.32
via patch
sys/dev/mii/ciphyreg.h 1.6
- The register bit definitions from register 0 to 15 in ciphyreg.h
conform to the 802.3 spec, so remove them and use mii.h's definition.
No functional change.
- Add CS8204, CS8244 VSC8211 and VSC8601 support from {Free,Open}BSD.
- KNF.
diffstat:
sys/dev/mii/ciphy.c | 122 ++++++++++++++++++++++----------------------
sys/dev/mii/ciphyreg.h | 130 +------------------------------------------------
2 files changed, 62 insertions(+), 190 deletions(-)
diffs (truncated from 418 to 300 lines):
diff -r 83071b5979e6 -r bacf03e5da94 sys/dev/mii/ciphy.c
--- a/sys/dev/mii/ciphy.c Sun Sep 01 10:14:20 2019 +0000
+++ b/sys/dev/mii/ciphy.c Sun Sep 01 10:19:04 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ciphy.c,v 1.26.10.1 2019/05/13 12:40:13 martin Exp $ */
+/* $NetBSD: ciphy.c,v 1.26.10.2 2019/09/01 10:19:04 martin Exp $ */
/*-
* Copyright (c) 2004
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ciphy.c,v 1.26.10.1 2019/05/13 12:40:13 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ciphy.c,v 1.26.10.2 2019/09/01 10:19:04 martin Exp $");
/*
* Driver for the Cicada CS8201 10/100/1000 copper PHY.
@@ -83,6 +83,15 @@
{ MII_OUI_CICADA, MII_MODEL_CICADA_CS8201B,
MII_STR_CICADA_CS8201B },
+ { MII_OUI_CICADA, MII_MODEL_CICADA_CS8204,
+ MII_STR_CICADA_CS8204 },
+
+ { MII_OUI_CICADA, MII_MODEL_CICADA_VSC8211,
+ MII_STR_CICADA_VSC8211 },
+
+ { MII_OUI_CICADA, MII_MODEL_CICADA_CS8244,
+ MII_STR_CICADA_CS8244 },
+
{ MII_OUI_xxCICADA, MII_MODEL_CICADA_CS8201,
MII_STR_CICADA_CS8201 },
@@ -92,6 +101,9 @@
{ MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CS8201B,
MII_STR_xxCICADA_CS8201B },
+ { MII_OUI_VITESSE, MII_MODEL_VITESSE_VSC8601,
+ MII_STR_VITESSE_VSC8601 },
+
{ 0, 0,
NULL },
};
@@ -103,9 +115,9 @@
struct mii_attach_args *ma = aux;
if (mii_phy_match(ma, ciphys) != NULL)
- return (10);
+ return 10;
- return (0);
+ return 0;
}
static void
@@ -151,11 +163,9 @@
switch (cmd) {
case MII_POLLSTAT:
- /*
- * If we're not polling our PHY instance, just return.
- */
+ /* If we're not polling our PHY instance, just return. */
if (IFM_INST(ife->ifm_media) != sc->mii_inst)
- return (0);
+ return 0;
break;
case MII_MEDIACHG:
@@ -166,12 +176,10 @@
if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
reg = PHY_READ(sc, MII_BMCR);
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
- return (0);
+ return 0;
}
- /*
- * If the interface is not up, don't do anything.
- */
+ /* If the interface is not up, don't do anything. */
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
break;
@@ -180,40 +188,37 @@
switch (IFM_SUBTYPE(ife->ifm_media)) {
case IFM_AUTO:
#ifdef foo
- /*
- * If we're already in auto mode, just return.
- */
- if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN)
- return (0);
+ /* If we're already in auto mode, just return. */
+ if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN)
+ return 0;
#endif
(void) mii_phy_auto(sc, 0);
break;
case IFM_1000_T:
- speed = CIPHY_S1000;
+ speed = BMCR_S1000;
goto setit;
case IFM_100_TX:
- speed = CIPHY_S100;
+ speed = BMCR_S100;
goto setit;
case IFM_10_T:
- speed = CIPHY_S10;
+ speed = BMCR_S10;
setit:
if ((ife->ifm_media & IFM_FDX) != 0) {
- speed |= CIPHY_BMCR_FDX;
- gig = CIPHY_1000CTL_AFD;
- } else {
- gig = CIPHY_1000CTL_AHD;
- }
+ speed |= BMCR_FDX;
+ gig = GTCR_ADV_1000TFDX;
+ } else
+ gig = GTCR_ADV_1000THDX;
- PHY_WRITE(sc, CIPHY_MII_1000CTL, 0);
- PHY_WRITE(sc, CIPHY_MII_BMCR, speed);
- PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE);
+ PHY_WRITE(sc, MII_100T2CR, 0);
+ PHY_WRITE(sc, MII_BMCR, speed);
+ PHY_WRITE(sc, MII_ANAR, ANAR_CSMA);
if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
break;
- PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
- PHY_WRITE(sc, CIPHY_MII_BMCR,
- speed|CIPHY_BMCR_AUTOEN|CIPHY_BMCR_STARTNEG);
+ PHY_WRITE(sc, MII_100T2CR, gig);
+ PHY_WRITE(sc, MII_BMCR,
+ speed | BMCR_AUTOEN | BMCR_STARTNEG);
/*
* When setting the link manually, one side must
@@ -224,38 +229,31 @@
* be a master, otherwise it's a slave.
*/
if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
- PHY_WRITE(sc, CIPHY_MII_1000CTL,
- gig|CIPHY_1000CTL_MSE|CIPHY_1000CTL_MSC);
+ PHY_WRITE(sc, MII_100T2CR,
+ gig | GTCR_MAN_MS | GTCR_ADV_MS);
} else {
- PHY_WRITE(sc, CIPHY_MII_1000CTL,
- gig|CIPHY_1000CTL_MSE);
+ PHY_WRITE(sc, MII_100T2CR, gig | GTCR_MAN_MS);
}
break;
case IFM_NONE:
- PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
+ PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
break;
case IFM_100_T4:
default:
- return (EINVAL);
+ return EINVAL;
}
break;
case MII_TICK:
- /*
- * If we're not currently selected, just return.
- */
+ /* If we're not currently selected, just return. */
if (IFM_INST(ife->ifm_media) != sc->mii_inst)
- return (0);
+ return 0;
- /*
- * Is the interface even up?
- */
+ /* Is the interface even up? */
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
- return (0);
+ return 0;
- /*
- * Only used for autonegotiation.
- */
+ /* Only used for autonegotiation. */
if ((IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) &&
(IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)) {
/*
@@ -290,14 +288,12 @@
if (sc->mii_ticks++ == 0)
break;
- /*
- * Only retry autonegotiation every N seconds.
- */
+ /* Only retry autonegotiation every N seconds. */
if (sc->mii_ticks <= MII_ANEGTICKS_GIGE)
break;
mii_phy_auto(sc, 0);
- return (0);
+ return 0;
}
/* Update the media status. */
@@ -313,7 +309,7 @@
ciphy_fixup(sc);
}
mii_phy_update(sc, cmd);
- return (0);
+ return 0;
}
static void
@@ -330,13 +326,13 @@
if (bmsr & BMSR_LINK)
mii->mii_media_status |= IFM_ACTIVE;
- bmcr = PHY_READ(sc, CIPHY_MII_BMCR);
+ bmcr = PHY_READ(sc, MII_BMCR);
- if (bmcr & CIPHY_BMCR_LOOP)
+ if (bmcr & BMCR_LOOP)
mii->mii_media_active |= IFM_LOOP;
- if (bmcr & CIPHY_BMCR_AUTOEN) {
- if ((bmsr & CIPHY_BMSR_ACOMP) == 0) {
+ if (bmcr & BMCR_AUTOEN) {
+ if ((bmsr & BMSR_ACOMP) == 0) {
/* Erg, still trying, I guess... */
mii->mii_media_active |= IFM_NONE;
return;
@@ -388,18 +384,19 @@
uint16_t model;
uint16_t status, speed;
- model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
+ model = MII_MODEL(PHY_READ(sc, MII_PHYIDR2));
status = PHY_READ(sc, CIPHY_MII_AUXCSR);
speed = status & CIPHY_AUXCSR_SPEED;
if (device_is_a(device_parent(sc->mii_dev), "nfe")) {
- /* need to set for 2.5V RGMII for NVIDIA adapters */
+ /* Need to set for 2.5V RGMII for NVIDIA adapters */
PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_INTSEL_RGMII);
PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_IOVOL_2500MV);
}
switch (model) {
case MII_MODEL_CICADA_CS8201:
+ case MII_MODEL_CICADA_CS8204:
/* Turn off "aux mode" (whatever that means) */
PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
@@ -430,11 +427,14 @@
if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
(status & CIPHY_AUXCSR_FDX)) {
PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
- } else {
+ } else
PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
- }
break;
+ case MII_MODEL_CICADA_VSC8211:
+ case MII_MODEL_CICADA_CS8244:
+ case MII_MODEL_VITESSE_VSC8601:
+ break;
default:
aprint_error_dev(sc->mii_dev, "unknown CICADA PHY model %x\n",
model);
diff -r 83071b5979e6 -r bacf03e5da94 sys/dev/mii/ciphyreg.h
--- a/sys/dev/mii/ciphyreg.h Sun Sep 01 10:14:20 2019 +0000
+++ b/sys/dev/mii/ciphyreg.h Sun Sep 01 10:19:04 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ciphyreg.h,v 1.5 2014/06/16 14:43:22 msaitoh Exp $ */
+/* $NetBSD: ciphyreg.h,v 1.5.20.1 2019/09/01 10:19:04 martin Exp $ */
/*-
* Copyright (c) 2004
@@ -42,134 +42,6 @@
* PHY, embedded within the VIA Networks VT6122 controller.
*/
-/* Command register */
-#define CIPHY_MII_BMCR 0x00
-#define CIPHY_BMCR_RESET 0x8000
-#define CIPHY_BMCR_LOOP 0x4000
-#define CIPHY_BMCR_SPD0 0x2000 /* speed select, lower bit */
-#define CIPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */
-#define CIPHY_BMCR_PDOWN 0x0800 /* Power down */
-#define CIPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */
-#define CIPHY_BMCR_FDX 0x0100 /* Duplex mode */
-#define CIPHY_BMCR_CTEST 0x0080 /* Collision test enable */
-#define CIPHY_BMCR_SPD1 0x0040 /* Speed select, upper bit */
-
-#define CIPHY_S1000 CIPHY_BMCR_SPD1 /* 1000mbps */
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