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[src/trunk]: src/sys/arch/arm/allwinner different twi pinsets and irqs for A31
details: https://anonhg.NetBSD.org/src/rev/081d55e83cdd
branches: trunk
changeset: 803088:081d55e83cdd
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sun Oct 12 14:06:18 2014 +0000
description:
different twi pinsets and irqs for A31
diffstat:
sys/arch/arm/allwinner/awin_intr.h | 11 ++++++++++-
sys/arch/arm/allwinner/awin_io.c | 18 +++++++++++-------
sys/arch/arm/allwinner/awin_reg.h | 10 ++++++++++
sys/arch/arm/allwinner/awin_twi.c | 25 +++++++++++++++++++++----
4 files changed, 52 insertions(+), 12 deletions(-)
diffs (145 lines):
diff -r cd19c5820c54 -r 081d55e83cdd sys/arch/arm/allwinner/awin_intr.h
--- a/sys/arch/arm/allwinner/awin_intr.h Sun Oct 12 14:04:52 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_intr.h Sun Oct 12 14:06:18 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_intr.h,v 1.5 2014/10/10 07:36:11 jmcneill Exp $ */
+/* $NetBSD: awin_intr.h,v 1.6 2014/10/12 14:06:18 jmcneill Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -138,6 +138,15 @@
* A31
*/
#define AWIN_A31_IRQ_UART0 32
+#define AWIN_A31_IRQ_UART1 33
+#define AWIN_A31_IRQ_UART2 34
+#define AWIN_A31_IRQ_UART3 35
+#define AWIN_A31_IRQ_UART4 36
+#define AWIN_A31_IRQ_UART5 37
+#define AWIN_A31_IRQ_TWI0 38
+#define AWIN_A31_IRQ_TWI1 39
+#define AWIN_A31_IRQ_TWI2 40
+#define AWIN_A31_IRQ_TWI3 41
#define AWIN_A31_IRQ_AC 61
#define AWIN_A31_IRQ_DMA 82
#define AWIN_A31_IRQ_SDMMC0 92
diff -r cd19c5820c54 -r 081d55e83cdd sys/arch/arm/allwinner/awin_io.c
--- a/sys/arch/arm/allwinner/awin_io.c Sun Oct 12 14:04:52 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_io.c Sun Oct 12 14:06:18 2014 +0000
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: awin_io.c,v 1.17 2014/10/11 10:31:13 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_io.c,v 1.18 2014/10/12 14:06:18 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -122,16 +122,20 @@
{ "awinmmc", OFFANDSIZE(SDMMC1), 4, AWIN_IRQ_SDMMC1, A10|A20 },
{ "awinmmc", OFFANDSIZE(SDMMC0), 0, AWIN_A31_IRQ_SDMMC0, A31 },
{ "ahcisata", OFFANDSIZE(SATA), NOPORT, AWIN_IRQ_SATA, A10|A20 },
- { "awiniic", OFFANDSIZE(TWI0), 0, AWIN_IRQ_TWI0, AANY },
- { "awiniic", OFFANDSIZE(TWI1), 1, AWIN_IRQ_TWI1, AANY },
- { "awiniic", OFFANDSIZE(TWI2), 2, AWIN_IRQ_TWI2, AANY },
- { "awiniic", OFFANDSIZE(TWI3), 3, AWIN_IRQ_TWI3, AANY },
- { "awiniic", OFFANDSIZE(TWI4), 4, AWIN_IRQ_TWI4, AANY },
+ { "awiniic", OFFANDSIZE(TWI0), 0, AWIN_IRQ_TWI0, A10|A20 },
+ { "awiniic", OFFANDSIZE(TWI1), 1, AWIN_IRQ_TWI1, A10|A20 },
+ { "awiniic", OFFANDSIZE(TWI2), 2, AWIN_IRQ_TWI2, A10|A20 },
+ { "awiniic", OFFANDSIZE(TWI3), 3, AWIN_IRQ_TWI3, A10|A20 },
+ { "awiniic", OFFANDSIZE(TWI4), 4, AWIN_IRQ_TWI4, A10|A20 },
+ { "awiniic", OFFANDSIZE(TWI0), 0, AWIN_A31_IRQ_TWI0, A31 },
+ { "awiniic", OFFANDSIZE(TWI1), 1, AWIN_A31_IRQ_TWI1, A31 },
+ { "awiniic", OFFANDSIZE(TWI2), 2, AWIN_A31_IRQ_TWI2, A31 },
+ { "awiniic", OFFANDSIZE(TWI3), 3, AWIN_A31_IRQ_TWI3, A31 },
{ "spi", OFFANDSIZE(SPI0), 0, AWIN_IRQ_SPI0, AANY },
{ "spi", OFFANDSIZE(SPI1), 1, AWIN_IRQ_SPI1, AANY },
{ "spi", OFFANDSIZE(SPI2), 1, AWIN_IRQ_SPI2, AANY },
{ "spi", OFFANDSIZE(SPI3), 3, AWIN_IRQ_SPI3, AANY },
- { "awe", OFFANDSIZE(EMAC), NOPORT, AWIN_IRQ_EMAC, AANY },
+ { "awe", OFFANDSIZE(EMAC), NOPORT, AWIN_IRQ_EMAC, A10|A20 },
{ "awge", OFFANDSIZE(GMAC), NOPORT, AWIN_IRQ_GMAC, A20 },
{ "awge", OFFANDSIZE(GMAC), NOPORT, AWIN_A31_IRQ_GMAC, A31 },
{ "awincrypto", OFFANDSIZE(SS), NOPORT, AWIN_IRQ_SS, AANY },
diff -r cd19c5820c54 -r 081d55e83cdd sys/arch/arm/allwinner/awin_reg.h
--- a/sys/arch/arm/allwinner/awin_reg.h Sun Oct 12 14:04:52 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_reg.h Sun Oct 12 14:06:18 2014 +0000
@@ -1780,4 +1780,14 @@
#define AWIN_A31_MMC_FIFO 0x0200
+#define AWIN_A31_PIO_PB_TWI3_FUNC 2
+#define AWIN_A31_PIO_PB_TWI3_PINS 0x00000060 /* PB pins 6-5 */
+
+#define AWIN_A31_PIO_PH_TWI0_FUNC 2
+#define AWIN_A31_PIO_PH_TWI0_PINS 0x0000c000 /* PH pins 15-14 */
+#define AWIN_A31_PIO_PH_TWI1_FUNC 2
+#define AWIN_A31_PIO_PH_TWI1_PINS 0x00030000 /* PH pins 17-16 */
+#define AWIN_A31_PIO_PH_TWI2_FUNC 2
+#define AWIN_A31_PIO_PH_TWI2_PINS 0x000c0000 /* PH pins 19-18 */
+
#endif /* _ARM_ALLWINNER_AWIN_REG_H_ */
diff -r cd19c5820c54 -r 081d55e83cdd sys/arch/arm/allwinner/awin_twi.c
--- a/sys/arch/arm/allwinner/awin_twi.c Sun Oct 12 14:04:52 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_twi.c Sun Oct 12 14:06:18 2014 +0000
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: awin_twi.c,v 1.3 2014/02/20 21:48:38 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_twi.c,v 1.4 2014/10/12 14:06:18 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -63,6 +63,13 @@
[4] = { 'I', AWIN_PIO_PI_TWI4_FUNC, AWIN_PIO_PI_TWI4_PINS },
};
+static const struct awin_gpio_pinset awin_twi_pinsets_a31[] = {
+ [0] = { 'H', AWIN_A31_PIO_PH_TWI0_FUNC, AWIN_A31_PIO_PH_TWI0_PINS },
+ [1] = { 'H', AWIN_A31_PIO_PH_TWI1_FUNC, AWIN_A31_PIO_PH_TWI1_PINS },
+ [2] = { 'H', AWIN_A31_PIO_PH_TWI2_FUNC, AWIN_A31_PIO_PH_TWI2_PINS },
+ [3] = { 'B', AWIN_A31_PIO_PB_TWI3_FUNC, AWIN_A31_PIO_PB_TWI3_PINS },
+};
+
CFATTACH_DECL_NEW(awin_twi, sizeof(struct awin_twi_softc),
awin_twi_match, awin_twi_attach, NULL, NULL);
@@ -71,6 +78,7 @@
{
struct awinio_attach_args * const aio = aux;
const struct awin_locators * const loc = &aio->aio_loc;
+ unsigned int port = loc->loc_port;
KASSERT(!strcmp(cf->cf_name, loc->loc_name));
KASSERT(cf->cf_loc[AWINIOCF_PORT] == AWINIOCF_PORT_DEFAULT
@@ -84,8 +92,13 @@
if (cf->cf_flags & 1)
return 0;
- if (!awin_gpio_pinset_available(&awin_twi_pinsets[loc->loc_port]))
- return 0;
+ if (awin_chip_id() == AWIN_CHIP_ID_A31) {
+ if (!awin_gpio_pinset_available(&awin_twi_pinsets_a31[port]))
+ return 0;
+ } else {
+ if (!awin_gpio_pinset_available(&awin_twi_pinsets[port]))
+ return 0;
+ }
return 1;
}
@@ -103,7 +116,11 @@
/*
* Acquite the PIO pins needed for the TWI port.
*/
- awin_gpio_pinset_acquire(&awin_twi_pinsets[loc->loc_port]);
+ if (awin_chip_id() == AWIN_CHIP_ID_A31) {
+ awin_gpio_pinset_acquire(&awin_twi_pinsets_a31[loc->loc_port]);
+ } else {
+ awin_gpio_pinset_acquire(&awin_twi_pinsets[loc->loc_port]);
+ }
/*
* Get a bus space handle for this TWI port.
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