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[src/trunk]: src/sys/dev/pci Disable D0 LPLU on 8257[12356], 82580, I350 and ...
details: https://anonhg.NetBSD.org/src/rev/9ac26d3204e9
branches: trunk
changeset: 825378:9ac26d3204e9
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Wed Jul 12 08:15:31 2017 +0000
description:
Disable D0 LPLU on 8257[12356], 82580, I350 and I21[01], too. Before this commit,
above devices and non-PCIe devices accessed wrong register.
diffstat:
sys/dev/pci/if_wm.c | 81 ++++++++++++++++++++++++++++++++-----------------
sys/dev/pci/if_wmreg.h | 6 +++-
2 files changed, 57 insertions(+), 30 deletions(-)
diffs (162 lines):
diff -r 9732bcf49b8b -r 9ac26d3204e9 sys/dev/pci/if_wm.c
--- a/sys/dev/pci/if_wm.c Wed Jul 12 07:38:17 2017 +0000
+++ b/sys/dev/pci/if_wm.c Wed Jul 12 08:15:31 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_wm.c,v 1.518 2017/07/06 08:50:52 msaitoh Exp $ */
+/* $NetBSD: if_wm.c,v 1.519 2017/07/12 08:15:31 msaitoh Exp $ */
/*
* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -73,7 +73,6 @@
* TODO (in order of importance):
*
* - Check XXX'ed comments
- * - Disable D0 LPLU on 8257[12356], 82580 and I350.
* - TX Multi queue improvement (refine queue selection logic)
* - Split header buffer for newer descriptors
* - EEE (Energy Efficiency Ethernet)
@@ -84,7 +83,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.518 2017/07/06 08:50:52 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.519 2017/07/12 08:15:31 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_net_mpsafe.h"
@@ -910,7 +909,6 @@
static void wm_enable_wakeup(struct wm_softc *);
/* LPLU (Low Power Link Up) */
static void wm_lplu_d0_disable(struct wm_softc *);
-static void wm_lplu_d0_disable_pch(struct wm_softc *);
/* EEE */
static void wm_set_eee_i350(struct wm_softc *);
@@ -8954,6 +8952,8 @@
case WM_T_82571:
case WM_T_82572:
case WM_T_82573:
+ case WM_T_82574:
+ case WM_T_82583:
case WM_T_82575:
case WM_T_82576:
case WM_T_82580:
@@ -8964,10 +8964,6 @@
case WM_T_80003:
/* null */
break;
- case WM_T_82574:
- case WM_T_82583:
- wm_lplu_d0_disable(sc);
- break;
case WM_T_82541:
case WM_T_82547:
/* XXX Configure actively LED after PHY reset */
@@ -9441,10 +9437,7 @@
return 0;
/* Disable D0 LPLU. */
- if (sc->sc_type >= WM_T_PCH) /* PCH* */
- wm_lplu_d0_disable_pch(sc);
- else
- wm_lplu_d0_disable(sc); /* ICH* */
+ wm_lplu_d0_disable(sc);
sc->sc_ctrl &= ~(CTRL_SPEED_MASK | CTRL_FD);
sc->sc_ctrl |= CTRL_SLU;
@@ -13381,28 +13374,58 @@
static void
wm_lplu_d0_disable(struct wm_softc *sc)
{
+ struct mii_data *mii = &sc->sc_mii;
uint32_t reg;
DPRINTF(WM_DEBUG_INIT, ("%s: %s called\n",
device_xname(sc->sc_dev), __func__));
- reg = CSR_READ(sc, WMREG_PHY_CTRL);
- reg &= ~(PHY_CTRL_GBE_DIS | PHY_CTRL_D0A_LPLU);
- CSR_WRITE(sc, WMREG_PHY_CTRL, reg);
-}
-
-static void
-wm_lplu_d0_disable_pch(struct wm_softc *sc)
-{
- uint32_t reg;
-
- DPRINTF(WM_DEBUG_INIT, ("%s: %s called\n",
- device_xname(sc->sc_dev), __func__));
-
- reg = wm_gmii_hv_readreg(sc->sc_dev, 1, HV_OEM_BITS);
- reg &= ~(HV_OEM_BITS_A1KDIS | HV_OEM_BITS_LPLU);
- reg |= HV_OEM_BITS_ANEGNOW;
- wm_gmii_hv_writereg(sc->sc_dev, 1, HV_OEM_BITS, reg);
+ printf("%s called\n", __func__);
+
+ if (sc->sc_phytype == WMPHY_IFE)
+ return;
+
+ switch (sc->sc_type) {
+ case WM_T_82571:
+ case WM_T_82572:
+ case WM_T_82573:
+ case WM_T_82575:
+ case WM_T_82576:
+ reg = mii->mii_readreg(sc->sc_dev, 1, MII_IGPHY_POWER_MGMT);
+ reg &= ~PMR_D0_LPLU;
+ mii->mii_writereg(sc->sc_dev, 1, MII_IGPHY_POWER_MGMT, reg);
+ break;
+ case WM_T_82580:
+ case WM_T_I350:
+ case WM_T_I210:
+ case WM_T_I211:
+ reg = CSR_READ(sc, WMREG_PHPM);
+ reg &= ~PHPM_D0A_LPLU;
+ CSR_WRITE(sc, WMREG_PHPM, reg);
+ break;
+ case WM_T_82574:
+ case WM_T_82583:
+ case WM_T_ICH8:
+ case WM_T_ICH9:
+ case WM_T_ICH10:
+ reg = CSR_READ(sc, WMREG_PHY_CTRL);
+ reg &= ~(PHY_CTRL_GBE_DIS | PHY_CTRL_D0A_LPLU);
+ CSR_WRITE(sc, WMREG_PHY_CTRL, reg);
+ CSR_WRITE_FLUSH(sc);
+ break;
+ case WM_T_PCH:
+ case WM_T_PCH2:
+ case WM_T_PCH_LPT:
+ case WM_T_PCH_SPT:
+ reg = wm_gmii_hv_readreg(sc->sc_dev, 1, HV_OEM_BITS);
+ reg &= ~(HV_OEM_BITS_A1KDIS | HV_OEM_BITS_LPLU);
+ if (wm_phy_resetisblocked(sc) == false)
+ reg |= HV_OEM_BITS_ANEGNOW;
+ wm_gmii_hv_writereg(sc->sc_dev, 1, HV_OEM_BITS, reg);
+ break;
+ default:
+ break;
+ }
}
/* EEE */
diff -r 9732bcf49b8b -r 9ac26d3204e9 sys/dev/pci/if_wmreg.h
--- a/sys/dev/pci/if_wmreg.h Wed Jul 12 07:38:17 2017 +0000
+++ b/sys/dev/pci/if_wmreg.h Wed Jul 12 08:15:31 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_wmreg.h,v 1.100 2017/06/26 04:22:46 msaitoh Exp $ */
+/* $NetBSD: if_wmreg.h,v 1.101 2017/07/12 08:15:31 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -951,6 +951,10 @@
#define WM_VLAN_TABSIZE 128
#define WMREG_PHPM 0x0e14 /* PHY Power Management */
+#define PHPM_SPD_EN __BIT(0) /* Smart Power Down */
+#define PHPM_D0A_LPLU __BIT(1) /* D0 Low Power Link Up */
+#define PHPM_NOND0A_LPLU __BIT(2) /* D0 Low Power Link Up */
+#define PHPM_NOND0A_GBE_DIS __BIT(3) /* D0 Low Power Link Up */
#define PHPM_GO_LINK_D __BIT(5) /* Go Link Disconnect */
#define WMREG_EEER 0x0e30 /* Energy Efficiency Ethernet "EEE" */
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