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[src/trunk]: src/sys/arch Spin up the non-boot CPUs, but don't allow cpu_boot...
details: https://anonhg.NetBSD.org/src/rev/e6b83f4116d7
branches: trunk
changeset: 806661:e6b83f4116d7
user: skrll <skrll%NetBSD.org@localhost>
date: Wed Mar 04 17:02:17 2015 +0000
description:
Spin up the non-boot CPUs, but don't allow cpu_boot_secondary_processors
to see them for now.
RPI2 nows works well with only the boot cpu.
diffstat:
sys/arch/arm/broadcom/bcm2835_intr.c | 10 +++--
sys/arch/arm/broadcom/bcm2835_obio.c | 11 +++++-
sys/arch/arm/cortex/a9_mpsubr.S | 6 +++-
sys/arch/evbarm/conf/RPI2 | 4 +-
sys/arch/evbarm/rpi/rpi_machdep.c | 60 ++++++++++++++++++++++++++++++++++-
5 files changed, 80 insertions(+), 11 deletions(-)
diffs (210 lines):
diff -r 615a77c86aaa -r e6b83f4116d7 sys/arch/arm/broadcom/bcm2835_intr.c
--- a/sys/arch/arm/broadcom/bcm2835_intr.c Wed Mar 04 16:55:11 2015 +0000
+++ b/sys/arch/arm/broadcom/bcm2835_intr.c Wed Mar 04 17:02:17 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_intr.c,v 1.5 2015/02/28 09:34:34 skrll Exp $ */
+/* $NetBSD: bcm2835_intr.c,v 1.6 2015/03/04 17:02:17 skrll Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.5 2015/02/28 09:34:34 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.6 2015/03/04 17:02:17 skrll Exp $");
#define _INTR_PRIVATE
@@ -67,12 +67,14 @@
static void bcm2836mp_pic_establish_irq(struct pic_softc *, struct intrsource *);
static void bcm2836mp_pic_source_name(struct pic_softc *, int, char *,
size_t);
+#if 0
#ifdef MULTIPROCESSOR
int bcm2836mp_ipi_handler(void *);
static void bcm2836mp_cpu_init(struct pic_softc *, struct cpu_info *);
static void bcm2836mp_send_ipi(struct pic_softc *, const kcpuset_t *, u_long);
#endif
#endif
+#endif
static int bcm2835_icu_match(device_t, cfdata_t, void *);
@@ -99,7 +101,7 @@
.pic_find_pending_irqs = bcm2836mp_pic_find_pending_irqs,
.pic_establish_irq = bcm2836mp_pic_establish_irq,
.pic_source_name = bcm2836mp_pic_source_name,
-#ifdef MULTIPROCESSOR
+#if 0 && defined(MULTIPROCESSOR)
.pic_cpu_init = bcm2836mp_cpu_init,
.pic_ipi_send = bcm2836mp_send_ipi,
#endif
@@ -203,7 +205,7 @@
pic_add(sc->sc_pic, 0);
#if defined(BCM2836)
-#ifdef MULTIPROCESSOR
+#if 0 && defined(MULTIPROCESSOR)
aprint_normal(": Multiprocessor");
#endif
pic_add(&bcm2836mp_pic, BCM2836_INT_LOCALBASE);
diff -r 615a77c86aaa -r e6b83f4116d7 sys/arch/arm/broadcom/bcm2835_obio.c
--- a/sys/arch/arm/broadcom/bcm2835_obio.c Wed Mar 04 16:55:11 2015 +0000
+++ b/sys/arch/arm/broadcom/bcm2835_obio.c Wed Mar 04 17:02:17 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_obio.c,v 1.23 2015/02/28 09:34:34 skrll Exp $ */
+/* $NetBSD: bcm2835_obio.c,v 1.24 2015/03/04 17:02:17 skrll Exp $ */
/*-
* Copyright (c) 2012, 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_obio.c,v 1.23 2015/02/28 09:34:34 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_obio.c,v 1.24 2015/03/04 17:02:17 skrll Exp $");
#include "locators.h"
#include "obio.h"
@@ -309,3 +309,10 @@
return UNCONF;
}
+
+#ifdef MULTIPROCESSOR
+void
+bcm2836_cpu_hatch(struct cpu_info *ci)
+{
+}
+#endif
diff -r 615a77c86aaa -r e6b83f4116d7 sys/arch/arm/cortex/a9_mpsubr.S
--- a/sys/arch/arm/cortex/a9_mpsubr.S Wed Mar 04 16:55:11 2015 +0000
+++ b/sys/arch/arm/cortex/a9_mpsubr.S Wed Mar 04 17:02:17 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: a9_mpsubr.S,v 1.29 2015/02/27 18:52:20 jmcneill Exp $ */
+/* $NetBSD: a9_mpsubr.S,v 1.30 2015/03/04 17:02:17 skrll Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -518,6 +518,10 @@
// Secondary processors come here after exiting the SKU ROM.
// Switches to kernel's endian almost immediately.
//
+
+ .global cortex_mpstart
+ .type cortex_mpstart,%object
+
cortex_mpstart:
#ifndef MULTIPROCESSOR
//
diff -r 615a77c86aaa -r e6b83f4116d7 sys/arch/evbarm/conf/RPI2
--- a/sys/arch/evbarm/conf/RPI2 Wed Mar 04 16:55:11 2015 +0000
+++ b/sys/arch/evbarm/conf/RPI2 Wed Mar 04 17:02:17 2015 +0000
@@ -1,5 +1,5 @@
#
-# $NetBSD: RPI2,v 1.1 2015/02/28 09:34:34 skrll Exp $
+# $NetBSD: RPI2,v 1.2 2015/03/04 17:02:17 skrll Exp $
#
# RPi2 -- Raspberry Pi 2
#
@@ -13,7 +13,7 @@
options BCM2836
options CPU_CORTEXA7
-#options MULTIPROCESSOR
+options MULTIPROCESSOR
options CORTEX_PMC
options TPIDRPRW_IS_CURCPU
makeoptions CPUFLAGS="-mcpu=cortex-a7 -mfpu=neon"
diff -r 615a77c86aaa -r e6b83f4116d7 sys/arch/evbarm/rpi/rpi_machdep.c
--- a/sys/arch/evbarm/rpi/rpi_machdep.c Wed Mar 04 16:55:11 2015 +0000
+++ b/sys/arch/evbarm/rpi/rpi_machdep.c Wed Mar 04 17:02:17 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rpi_machdep.c,v 1.57 2015/02/28 09:34:34 skrll Exp $ */
+/* $NetBSD: rpi_machdep.c,v 1.58 2015/03/04 17:02:17 skrll Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -30,10 +30,11 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rpi_machdep.c,v 1.57 2015/02/28 09:34:34 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rpi_machdep.c,v 1.58 2015/03/04 17:02:17 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_bcm283x.h"
+#include "opt_cpuoptions.h"
#include "opt_ddb.h"
#include "opt_evbarm_boardtype.h"
#include "opt_kgdb.h"
@@ -489,6 +490,59 @@
#endif
}
+
+static void
+rpi_bootstrap(void)
+{
+#if defined(BCM2836)
+ arm_cpu_max = 4;
+ extern int cortex_mmuinfo;
+ bus_space_tag_t iot = &bcm2835_bs_tag;
+ bus_space_handle_t ioh = BCM2836_ARM_LOCAL_VBASE;
+
+#ifdef VERBOSE_INIT_ARM
+ printf("%s: %d cpus present\n", __func__, arm_cpu_max);
+#endif
+
+ extern void cortex_mpstart(void);
+ cortex_mmuinfo = armreg_ttbr_read();
+
+ for (size_t i = 1; i < arm_cpu_max; i++) {
+ bus_space_write_4(iot, ioh,
+ BCM2836_LOCAL_MAILBOX3_SETN(i),
+ (uint32_t)cortex_mpstart);
+
+ int timeout = 20;
+ while (timeout-- > 0) {
+ uint32_t val;
+
+ val = bus_space_read_4(iot, ioh,
+ BCM2836_LOCAL_MAILBOX3_CLRN(i));
+ if (val == 0)
+ break;
+ }
+ }
+
+ for (int loop = 0; loop < 16; loop++) {
+ if (arm_cpu_hatched == __BITS(arm_cpu_max - 1, 1))
+ break;
+ gtmr_delay(10000);
+ }
+
+ for (size_t i = 1; i < arm_cpu_max; i++) {
+ if ((arm_cpu_hatched & (1 << i)) == 0) {
+ printf("%s: warning: cpu%zu failed to hatch\n",
+ __func__, i);
+ }
+ }
+
+ /*
+ * XXXNH: Disable non-boot CPUs for now
+ */
+ arm_cpu_hatched = 0;
+#endif
+}
+
/*
* Static device mappings. These peripheral registers are mapped at
* fixed virtual addresses very early in initarm() so that we can use
@@ -571,6 +625,8 @@
rpi_bootparams();
+ rpi_bootstrap();
+
if (vcprop_tag_success_p(&vb.vbt_armclockrate.tag)) {
curcpu()->ci_data.cpu_cc_freq = vb.vbt_armclockrate.rate;
#ifdef VERBOSE_INIT_ARM
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