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[src/matt-nb8-mediatek]: src/sys/arch/evbarm/mediatek Add Mediatek ATLAS support



details:   https://anonhg.NetBSD.org/src/rev/e78c4ae99f97
branches:  matt-nb8-mediatek
changeset: 851114:e78c4ae99f97
user:      matt <matt%NetBSD.org@localhost>
date:      Wed Dec 13 01:22:35 2017 +0000

description:
Add Mediatek ATLAS support

diffstat:

 sys/arch/evbarm/mediatek/genassym.cf |   38 +++++++
 sys/arch/evbarm/mediatek/mtk_start.S |  188 +++++++++++++++++++++++++++++++++++
 sys/arch/evbarm/mediatek/platform.h  |   45 ++++++++
 3 files changed, 271 insertions(+), 0 deletions(-)

diffs (283 lines):

diff -r 718076382f4d -r e78c4ae99f97 sys/arch/evbarm/mediatek/genassym.cf
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/evbarm/mediatek/genassym.cf      Wed Dec 13 01:22:35 2017 +0000
@@ -0,0 +1,38 @@
+# $NetBSD: genassym.cf,v 1.1.2.1 2017/12/13 01:22:35 matt Exp $
+
+#-
+# Copyright (c) 2013 The NetBSD Foundation, Inc.
+# All rights reserved.
+#
+# This code is derived from software contributed to The NetBSD Foundation
+# by Matt Thomas of 3am Software Foundry.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+include <dev/ic/ns16550reg.h>
+include <dev/ic/comreg.h>
+
+define LSR_TXRDY               LSR_TXRDY
+define LSR_TSRE                LSR_TSRE
+define COM_DATA                com_data
+define COM_LSR                 com_lsr
diff -r 718076382f4d -r e78c4ae99f97 sys/arch/evbarm/mediatek/mtk_start.S
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/evbarm/mediatek/mtk_start.S      Wed Dec 13 01:22:35 2017 +0000
@@ -0,0 +1,188 @@
+/*-
+ * Copyright (c) 2014 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Matt Thomas of 3am Software Foundry.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "opt_mtk.h"
+#include "opt_com.h"
+#include "opt_cpuoptions.h"
+#include "opt_cputypes.h"
+#include "opt_multiprocessor.h"
+#include "opt_arm_debug.h"
+#include "opt_fdt_arm.h"
+
+#include <arm/asm.h>
+#include <arm/armreg.h>
+#include "assym.h"
+
+#include <arm/mediatek/mercury_reg.h>
+#include <evbarm/mediatek/platform.h>
+
+RCSID("$NetBSD: mtk_start.S,v 1.1.2.1 2017/12/13 01:22:35 matt Exp $")
+
+#if defined(VERBOSE_INIT_ARM)
+#define        XPUTC(n)        mov r0, n; bl xputc
+#if KERNEL_BASE_VOFFSET == 0
+#define        XPUTC2(n)       mov r0, n; bl xputc
+#else
+#define XPUTC2(n)      mov r0, n; blx r11
+#endif
+#ifdef __ARMEB__
+#define COM_BSWAP
+#endif
+#define COM_MULT       4
+#define XPUTC_COM      1
+#else
+#define        XPUTC(n)
+#define        XPUTC2(n)
+#endif
+
+#define INIT_MEMSIZE   128
+#define        TEMP_L1_TABLE   (KERNEL_BASE - KERNEL_BASE_VOFFSET + INIT_MEMSIZE * L1_S_SIZE - L1_TABLE_SIZE)
+
+#define        MD_CPU_HATCH    _C_LABEL(arm_fdt_cpu_hatch)
+
+/*
+ * Kernel start routine for ALTAS boards.
+ * At this point, this code has been loaded into SDRAM
+ * and the MMU maybe on or maybe off.
+ */
+#ifdef KERNEL_BASES_EQUAL
+       .text
+#else
+       .section .start,"ax",%progbits
+#endif
+
+       .global _C_LABEL(mtk_start)
+_C_LABEL(mtk_start):
+#ifdef __ARMEB__
+       setend  be                      /* force big endian */
+#endif
+       mov     r9, #0
+
+       /* Move into supervisor mode and disable IRQs/FIQs. */
+       cpsid   if, #PSR_SVC32_MODE
+
+       /*
+        * Save any arguments passed to us.
+        */
+       movw    r4, #:lower16:uboot_args
+       movt    r4, #:upper16:uboot_args
+#if KERNEL_BASE_VOFFSET != 0
+       /*
+        * But since .start is at 0x40000000 and .text is at 0x8000000, we
+        * can't directly use the address that the linker gave us directly.
+        * We have to adjust the address the linker gave us to get the to
+        * the physical address.
+        */
+       sub     r4, r4, #KERNEL_BASE_VOFFSET
+#endif
+
+       stmia   r4, {r0-r3}             // Save the arguments
+
+       /*
+        * Turn on the SMP bit
+        */
+       bl      cortex_init
+
+       /*
+        * Set up a preliminary mapping in the MMU to allow us to run
+        * at KERNEL_BASE with caches on.
+        */
+       movw    r0, #:lower16:TEMP_L1_TABLE
+       movt    r0, #:upper16:TEMP_L1_TABLE
+       movw    r1, #:lower16:.Lmmu_init_table
+       movt    r1, #:upper16:.Lmmu_init_table
+       bl      arm_boot_l1pt_init
+
+       /*
+        * Turn on the MMU, Caches, etc.  Return to new enabled address space.
+        */
+       movw    r0, #:lower16:TEMP_L1_TABLE
+       movt    r0, #:upper16:TEMP_L1_TABLE
+#if KERNEL_BASE_VOFFSET == 0
+       bl      arm_cpuinit
+#else
+       /*
+        * After the MMU is on, we can execute in the normal .text segment
+        * so setup the lr to be in .text.  Cache the address for xputc
+        * before we go.
+        */
+#if defined(VERBOSE_INIT_ARM)
+       adr     r11, xputc              @ for XPUTC2
+#endif
+       movw    lr, #:lower16:1f
+       movt    lr, #:upper16:1f
+       b       arm_cpuinit
+       .pushsection .text,"ax",%progbits
+1:
+#endif
+
+#if defined(MULTIPROCESSOR)
+       // Now spin up the second processors into the same state we are now.
+       // Make sure the cache is flushed out to RAM for the other CPUs
+       bl      _C_LABEL(armv7_dcache_wbinv_all)
+
+#endif /* MULTIPROCESSOR */
+
+       /*
+        * Jump to start in locore.S, which in turn will call initarm and main.
+        */
+       b       start
+
+       /* NOTREACHED */
+
+#ifndef KERNEL_BASES_EQUAL
+       .popsection
+#endif
+
+#include <arm/cortex/a9_mpsubr.S>
+
+.Lmmu_init_table:
+       /* Map KERNEL_BASE VA to SDRAM PA, write-back cacheable, shareable */
+       MMU_INIT(KERNEL_BASE, KERNEL_BASE - KERNEL_BASE_VOFFSET, INIT_MEMSIZE,
+               L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_CACHEABLE)
+
+#if KERNEL_BASE_VOFFSET != 0
+       /* Map memory 1:1 VA to PA, write-back cacheable, shareable */
+       MMU_INIT(KERNEL_BASE - KERNEL_BASE_VOFFSET,
+               KERNEL_BASE - KERNEL_BASE_VOFFSET, INIT_MEMSIZE,
+               L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_CACHEABLE)
+#endif
+       // Map IO CORE (so console will work)
+       MMU_INIT(MTK_KERNEL_IO_VBASE, MTK_IO_PHYS,
+               (MTK_IO_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
+               L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_V6_XN)
+
+       // Map MTK IO (so console will work)
+       MMU_INIT(MTK_IO_PHYS, MTK_IO_PHYS,
+               (MTK_IO_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
+               L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_V6_XN)
+
+       // end of table
+       MMU_INIT(0, 0, 0, 0)
+END(_C_LABEL(mtk_start))
diff -r 718076382f4d -r e78c4ae99f97 sys/arch/evbarm/mediatek/platform.h
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/evbarm/mediatek/platform.h       Wed Dec 13 01:22:35 2017 +0000
@@ -0,0 +1,45 @@
+/* $NetBSD: platform.h,v 1.1.2.1 2017/12/13 01:22:35 matt Exp $ */
+/*-
+ * Copyright (c) 2017 Mediatek Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _EVBARM_MERCURY_PLATFORM_H
+#define _EVBARM_MERCURY_PLATFORM_H
+
+#include <arm/mediatek/mercury_reg.h>
+
+#define KERNEL_VM_BASE                 0xc0000000  //(0xc0000000 + 0x10000000)
+#define KERNEL_VM_SIZE                 0x30000000  //(0x20000000 - 0x10000000)
+
+#define MERCURY_CBAR    0x10310000
+/*
+ * We devmap IO starting at KERNEL_VM_BASE + KERNEL_VM_SIZE
+ */
+#define MTK_KERNEL_IO_VBASE        (KERNEL_VM_BASE + KERNEL_VM_SIZE)
+#define MTK_KERNEL_IO_VEND         (MTK_KERNEL_IO_VBASE + MTK_IO_SIZE)
+#ifndef _LOCORE
+CTASSERT(MTK_KERNEL_IO_VEND <= VM_MAX_KERNEL_ADDRESS);
+#endif
+#endif /* _EVBARM_MERCURY_PLATFORM_H */



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