[src/trunk]: src/sys/arch/arm/nvidia enable PHYs

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/c8127bf4faae
branches:  trunk
changeset: 826753:c8127bf4faae
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Wed Sep 27 10:19:13 2017 +0000

description:
enable PHYs

diffstat:

 sys/arch/arm/nvidia/tegra_pcie.c |  15 ++++++++++++---
 1 files changed, 12 insertions(+), 3 deletions(-)

diffs (49 lines):

diff -r 22c5c00d222c -r c8127bf4faae sys/arch/arm/nvidia/tegra_pcie.c
--- a/sys/arch/arm/nvidia/tegra_pcie.c  Wed Sep 27 10:12:47 2017 +0000
+++ b/sys/arch/arm/nvidia/tegra_pcie.c  Wed Sep 27 10:19:13 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_pcie.c,v 1.21 2017/09/26 16:12:45 jmcneill Exp $ */
+/* $NetBSD: tegra_pcie.c,v 1.22 2017/09/27 10:19:13 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_pcie.c,v 1.21 2017/09/26 16:12:45 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_pcie.c,v 1.22 2017/09/27 10:19:13 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -374,13 +374,21 @@
 static void
 tegra_pcie_enable_ports(struct tegra_pcie_softc * const sc)
 {
+       struct fdtbus_phy *phy;
        const u_int *data;
-       int child, len;
+       int child, len, n;
        uint32_t val;
 
        for (child = OF_child(sc->sc_phandle); child; child = OF_peer(child)) {
                if (!fdtbus_status_okay(child))
                        continue;
+
+               /* Enable PHYs */
+               for (n = 0; (phy = fdtbus_phy_get_index(child, n)) != NULL; n++)
+                       if (fdtbus_phy_enable(phy, true) != 0)
+                               aprint_error_dev(sc->sc_dev, "couldn't enable %s phy #%d\n",
+                                   fdtbus_get_string(child, "name"), n);
+
                data = fdtbus_get_prop(child, "reg", &len);
                if (data == NULL || len < 4)
                        continue;
@@ -393,6 +401,7 @@
                bus_space_write_4(sc->sc_bst, sc->sc_bsh_afi, AFI_PEXn_CTRL_REG(index), val);
 
                tegra_pcie_reset_port(sc, index);
+
        }
 }