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[src/trunk]: src/sys/arch/arm/rockchip Add I2C clocks
details: https://anonhg.NetBSD.org/src/rev/48d450fb81fc
branches: trunk
changeset: 834446:48d450fb81fc
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sun Aug 12 19:28:41 2018 +0000
description:
Add I2C clocks
diffstat:
sys/arch/arm/rockchip/rk3399_cru.c | 56 +++++++++++++++++++++++++++++++++-
sys/arch/arm/rockchip/rk3399_pmucru.c | 26 +++++++++++++++-
2 files changed, 78 insertions(+), 4 deletions(-)
diffs (129 lines):
diff -r 67e17d3832f5 -r 48d450fb81fc sys/arch/arm/rockchip/rk3399_cru.c
--- a/sys/arch/arm/rockchip/rk3399_cru.c Sun Aug 12 19:23:20 2018 +0000
+++ b/sys/arch/arm/rockchip/rk3399_cru.c Sun Aug 12 19:28:41 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_cru.c,v 1.1 2018/08/12 16:48:05 jmcneill Exp $ */
+/* $NetBSD: rk3399_cru.c,v 1.2 2018/08/12 19:28:41 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.1 2018/08/12 16:48:05 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.2 2018/08/12 19:28:41 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -601,6 +601,58 @@
RK_GATE(RK3399_ACLK_USB3OTG1, "aclk_usb3otg1", "aclk_usb3", CLKGATE_CON(30), 2),
RK_GATE(RK3399_ACLK_USB3_RKSOC_AXI_PERF, "aclk_usb3_rksoc_axi_perf", "aclk_usb3", CLKGATE_CON(30), 3),
RK_GATE(RK3399_ACLK_USB3_GRF, "aclk_usb3_grf", "aclk_usb3", CLKGATE_CON(30), 4),
+
+ /*
+ * I2C
+ */
+ RK_COMPOSITE(RK3399_SCLK_I2C1, "clk_i2c1", mux_pll_src_cpll_gpll_parents,
+ CLKSEL_CON(61), /* muxdiv_reg */
+ __BIT(7), /* mux_mask */
+ __BITS(6,0), /* div_mask */
+ CLKGATE_CON(10), /* gate_reg */
+ __BIT(0), /* gate_mask */
+ 0),
+ RK_COMPOSITE(RK3399_SCLK_I2C2, "clk_i2c2", mux_pll_src_cpll_gpll_parents,
+ CLKSEL_CON(62), /* muxdiv_reg */
+ __BIT(7), /* mux_mask */
+ __BITS(6,0), /* div_mask */
+ CLKGATE_CON(10), /* gate_reg */
+ __BIT(2), /* gate_mask */
+ 0),
+ RK_COMPOSITE(RK3399_SCLK_I2C3, "clk_i2c3", mux_pll_src_cpll_gpll_parents,
+ CLKSEL_CON(63), /* muxdiv_reg */
+ __BIT(7), /* mux_mask */
+ __BITS(6,0), /* div_mask */
+ CLKGATE_CON(10), /* gate_reg */
+ __BIT(4), /* gate_mask */
+ 0),
+ RK_COMPOSITE(RK3399_SCLK_I2C5, "clk_i2c5", mux_pll_src_cpll_gpll_parents,
+ CLKSEL_CON(61), /* muxdiv_reg */
+ __BIT(15), /* mux_mask */
+ __BITS(14,8), /* div_mask */
+ CLKGATE_CON(10), /* gate_reg */
+ __BIT(1), /* gate_mask */
+ 0),
+ RK_COMPOSITE(RK3399_SCLK_I2C6, "clk_i2c6", mux_pll_src_cpll_gpll_parents,
+ CLKSEL_CON(62), /* muxdiv_reg */
+ __BIT(15), /* mux_mask */
+ __BITS(14,8), /* div_mask */
+ CLKGATE_CON(10), /* gate_reg */
+ __BIT(3), /* gate_mask */
+ 0),
+ RK_COMPOSITE(RK3399_SCLK_I2C7, "clk_i2c7", mux_pll_src_cpll_gpll_parents,
+ CLKSEL_CON(63), /* muxdiv_reg */
+ __BIT(15), /* mux_mask */
+ __BITS(14,8), /* div_mask */
+ CLKGATE_CON(10), /* gate_reg */
+ __BIT(5), /* gate_mask */
+ 0),
+ RK_GATE(RK3399_PCLK_I2C7, "pclk_rki2c7", "pclk_perilp1", CLKGATE_CON(22), 5),
+ RK_GATE(RK3399_PCLK_I2C1, "pclk_rki2c1", "pclk_perilp1", CLKGATE_CON(22), 6),
+ RK_GATE(RK3399_PCLK_I2C5, "pclk_rki2c5", "pclk_perilp1", CLKGATE_CON(22), 7),
+ RK_GATE(RK3399_PCLK_I2C6, "pclk_rki2c6", "pclk_perilp1", CLKGATE_CON(22), 8),
+ RK_GATE(RK3399_PCLK_I2C2, "pclk_rki2c2", "pclk_perilp1", CLKGATE_CON(22), 9),
+ RK_GATE(RK3399_PCLK_I2C3, "pclk_rki2c3", "pclk_perilp1", CLKGATE_CON(22), 10),
};
static int
diff -r 67e17d3832f5 -r 48d450fb81fc sys/arch/arm/rockchip/rk3399_pmucru.c
--- a/sys/arch/arm/rockchip/rk3399_pmucru.c Sun Aug 12 19:23:20 2018 +0000
+++ b/sys/arch/arm/rockchip/rk3399_pmucru.c Sun Aug 12 19:28:41 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_pmucru.c,v 1.1 2018/08/12 16:48:05 jmcneill Exp $ */
+/* $NetBSD: rk3399_pmucru.c,v 1.2 2018/08/12 19:28:41 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: rk3399_pmucru.c,v 1.1 2018/08/12 16:48:05 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_pmucru.c,v 1.2 2018/08/12 19:28:41 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -293,11 +293,33 @@
__BIT(31), /* lock_mask */
pll_rates),
+ RK_COMPOSITE_NOMUX(RK3399_SCLK_I2C0_PMU, "clk_i2c0_pmu", "ppll",
+ CLKSEL_CON(2), /* div_reg */
+ __BITS(6,0), /* div_mask */
+ CLKGATE_CON(0), /* gate_reg */
+ __BIT(9), /* gate_mask */
+ 0),
+ RK_COMPOSITE_NOMUX(RK3399_SCLK_I2C4_PMU, "clk_i2c4_pmu", "ppll",
+ CLKSEL_CON(3), /* div_reg */
+ __BITS(6,0), /* div_mask */
+ CLKGATE_CON(0), /* gate_reg */
+ __BIT(10), /* gate_mask */
+ 0),
+ RK_COMPOSITE_NOMUX(RK3399_SCLK_I2C8_PMU, "clk_i2c8_pmu", "ppll",
+ CLKSEL_CON(2), /* div_reg */
+ __BITS(14,8), /* div_mask */
+ CLKGATE_CON(0), /* gate_reg */
+ __BIT(11), /* gate_mask */
+ 0),
+
RK_DIV(RK3399_PCLK_SRC_PMU, "pclk_pmu_src", "ppll", CLKSEL_CON(0), __BITS(4,0), 0),
RK_GATE(RK3399_PCLK_PMU, "pclk_pmu", "pclk_pmu_src", CLKGATE_CON(1), 0),
RK_GATE(RK3399_PCLK_GPIO0_PMU, "pclk_gpio0_pmu", "pclk_pmu_src", CLKGATE_CON(1), 3),
RK_GATE(RK3399_PCLK_GPIO1_PMU, "pclk_gpio1_pmu", "pclk_pmu_src", CLKGATE_CON(1), 4),
+ RK_GATE(RK3399_PCLK_I2C0_PMU, "pclk_i2c0_pmu", "pclk_pmu_src", CLKGATE_CON(1), 7),
+ RK_GATE(RK3399_PCLK_I2C4_PMU, "pclk_i2c4_pmu", "pclk_pmu_src", CLKGATE_CON(1), 8),
+ RK_GATE(RK3399_PCLK_I2C8_PMU, "pclk_i2c8_pmu", "pclk_pmu_src", CLKGATE_CON(1), 9),
};
static int
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