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[src/netbsd-8]: src/sys Pull up following revision(s) (requested by jmcneill ...
details: https://anonhg.NetBSD.org/src/rev/a381d4aee005
branches: netbsd-8
changeset: 850867:a381d4aee005
user: snj <snj%NetBSD.org@localhost>
date: Tue Jul 25 01:49:13 2017 +0000
description:
Pull up following revision(s) (requested by jmcneill in ticket #139):
sys/arch/arm/sunxi/sunxi_mmc.c: revision 1.2
sys/dev/sdmmc/ld_sdmmc.c: revision 1.31
sys/dev/sdmmc/sdmmc_mem.c: revision 1.61
sys/dev/sdmmc/sdmmcreg.h: revision 1.32
sys/dev/sdmmc/sdmmcvar.h: revision 1.28
Add support for eMMC 4.5's optional cache feature. If a cache is present,
and the host controller reports the SMC_CAPS_POLLING capability (needed
to flush cache at shutdown), it will be automatically enabled and used.
--
Add SMC_CAPS_POLLING support.
diffstat:
sys/arch/arm/sunxi/sunxi_mmc.c | 39 ++++++++++++++++---------
sys/dev/sdmmc/ld_sdmmc.c | 28 +++++++++++++++++-
sys/dev/sdmmc/sdmmc_mem.c | 62 +++++++++++++++++++++++++++++++++++++----
sys/dev/sdmmc/sdmmcreg.h | 12 +++++++-
sys/dev/sdmmc/sdmmcvar.h | 9 ++++-
5 files changed, 124 insertions(+), 26 deletions(-)
diffs (truncated from 412 to 300 lines):
diff -r 241ab06b96d1 -r a381d4aee005 sys/arch/arm/sunxi/sunxi_mmc.c
--- a/sys/arch/arm/sunxi/sunxi_mmc.c Tue Jul 25 01:43:37 2017 +0000
+++ b/sys/arch/arm/sunxi/sunxi_mmc.c Tue Jul 25 01:49:13 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_mmc.c,v 1.3.4.2 2017/07/18 19:13:08 snj Exp $ */
+/* $NetBSD: sunxi_mmc.c,v 1.3.4.3 2017/07/25 01:49:13 snj Exp $ */
/*-
* Copyright (c) 2014-2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_mmc.c,v 1.3.4.2 2017/07/18 19:13:08 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_mmc.c,v 1.3.4.3 2017/07/25 01:49:13 snj Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -317,7 +317,8 @@
SMC_CAPS_MULTI_SEG_DMA |
SMC_CAPS_AUTO_STOP |
SMC_CAPS_SD_HIGHSPEED |
- SMC_CAPS_MMC_HIGHSPEED;
+ SMC_CAPS_MMC_HIGHSPEED |
+ SMC_CAPS_POLLING;
if (width == 4)
saa.saa_caps |= SMC_CAPS_4BIT_MODE;
if (width == 8)
@@ -368,7 +369,8 @@
}
static int
-sunxi_mmc_wait_rint(struct sunxi_mmc_softc *sc, uint32_t mask, int timeout)
+sunxi_mmc_wait_rint(struct sunxi_mmc_softc *sc, uint32_t mask,
+ int timeout, bool poll)
{
int retry;
int error;
@@ -378,15 +380,24 @@
if (sc->sc_intr_rint & mask)
return 0;
- retry = timeout / hz;
+ if (poll)
+ retry = timeout / hz * 1000;
+ else
+ retry = timeout / hz;
while (retry > 0) {
- error = cv_timedwait(&sc->sc_intr_cv,
- &sc->sc_intr_lock, hz);
- if (error && error != EWOULDBLOCK)
- return error;
+ if (poll) {
+ sc->sc_intr_rint |= MMC_READ(sc, SUNXI_MMC_RINT);
+ } else {
+ error = cv_timedwait(&sc->sc_intr_cv,
+ &sc->sc_intr_lock, hz);
+ if (error && error != EWOULDBLOCK)
+ return error;
+ }
if (sc->sc_intr_rint & mask)
return 0;
+ if (poll)
+ delay(1000);
--retry;
}
@@ -420,7 +431,6 @@
MMC_WRITE(sc, SUNXI_MMC_GCTRL,
MMC_READ(sc, SUNXI_MMC_GCTRL) | SUNXI_MMC_GCTRL_INTEN);
-
return 0;
}
@@ -680,13 +690,14 @@
{
struct sunxi_mmc_softc *sc = sch;
uint32_t cmdval = SUNXI_MMC_CMD_START;
+ const bool poll = (cmd->c_flags & SCF_POLL) != 0;
int retry;
#ifdef SUNXI_MMC_DEBUG
aprint_normal_dev(sc->sc_dev,
- "opcode %d flags 0x%x data %p datalen %d blklen %d\n",
+ "opcode %d flags 0x%x data %p datalen %d blklen %d poll %d\n",
cmd->c_opcode, cmd->c_flags, cmd->c_data, cmd->c_datalen,
- cmd->c_blklen);
+ cmd->c_blklen, poll);
#endif
mutex_enter(&sc->sc_intr_lock);
@@ -766,7 +777,7 @@
}
cmd->c_error = sunxi_mmc_wait_rint(sc,
- SUNXI_MMC_INT_ERROR|SUNXI_MMC_INT_CMD_DONE, hz * 10);
+ SUNXI_MMC_INT_ERROR|SUNXI_MMC_INT_CMD_DONE, hz * 10, poll);
if (cmd->c_error == 0 && (sc->sc_intr_rint & SUNXI_MMC_INT_ERROR)) {
if (sc->sc_intr_rint & SUNXI_MMC_INT_RESP_TIMEOUT) {
cmd->c_error = ETIMEDOUT;
@@ -787,7 +798,7 @@
SUNXI_MMC_INT_ERROR|
SUNXI_MMC_INT_AUTO_CMD_DONE|
SUNXI_MMC_INT_DATA_OVER,
- hz*10);
+ hz*10, poll);
if (cmd->c_error == 0 &&
(sc->sc_intr_rint & SUNXI_MMC_INT_ERROR)) {
cmd->c_error = ETIMEDOUT;
diff -r 241ab06b96d1 -r a381d4aee005 sys/dev/sdmmc/ld_sdmmc.c
--- a/sys/dev/sdmmc/ld_sdmmc.c Tue Jul 25 01:43:37 2017 +0000
+++ b/sys/dev/sdmmc/ld_sdmmc.c Tue Jul 25 01:49:13 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ld_sdmmc.c,v 1.26.4.3 2017/07/10 12:29:47 martin Exp $ */
+/* $NetBSD: ld_sdmmc.c,v 1.26.4.4 2017/07/25 01:49:13 snj Exp $ */
/*
* Copyright (c) 2008 KIYOHARA Takashi
@@ -28,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ld_sdmmc.c,v 1.26.4.3 2017/07/10 12:29:47 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ld_sdmmc.c,v 1.26.4.4 2017/07/25 01:49:13 snj Exp $");
#ifdef _KERNEL_OPT
#include "opt_sdmmc.h"
@@ -94,6 +94,7 @@
static int ld_sdmmc_start(struct ld_softc *, struct buf *);
static void ld_sdmmc_restart(void *);
static int ld_sdmmc_discard(struct ld_softc *, off_t, off_t);
+static int ld_sdmmc_ioctl(struct ld_softc *, u_long, void *, int32_t, bool);
static void ld_sdmmc_doattach(void *);
static void ld_sdmmc_dobio(void *);
@@ -151,6 +152,7 @@
ld->sc_dump = ld_sdmmc_dump;
ld->sc_start = ld_sdmmc_start;
ld->sc_discard = ld_sdmmc_discard;
+ ld->sc_ioctl = ld_sdmmc_ioctl;
/*
* It is avoided that the error occurs when the card attaches it,
@@ -169,11 +171,19 @@
struct ld_sdmmc_softc *sc = (struct ld_sdmmc_softc *)arg;
struct ld_softc *ld = &sc->sc_ld;
struct sdmmc_softc *ssc = device_private(device_parent(ld->sc_dv));
+ const u_int cache_size = sc->sc_sf->ext_csd.cache_size;
+ char buf[sizeof("9999 KB")];
ldattach(ld, BUFQ_DISK_DEFAULT_STRAT);
aprint_normal_dev(ld->sc_dv, "%d-bit width,", sc->sc_sf->width);
if (ssc->sc_transfer_mode != NULL)
aprint_normal(" %s,", ssc->sc_transfer_mode);
+ if (cache_size > 0) {
+ format_bytes(buf, sizeof(buf), cache_size);
+ aprint_normal(" %s cache%s,", buf,
+ ISSET(sc->sc_sf->flags, SFF_CACHE_ENABLED) ? "" :
+ " (disabled)");
+ }
if ((ssc->sc_busclk / 1000) != 0)
aprint_normal(" %u.%03u MHz\n",
ssc->sc_busclk / 1000, ssc->sc_busclk % 1000);
@@ -307,6 +317,20 @@
return sdmmc_mem_discard(sc->sc_sf, pos, len);
}
+static int
+ld_sdmmc_ioctl(struct ld_softc *ld, u_long cmd, void *addr, int32_t flag,
+ bool poll)
+{
+ struct ld_sdmmc_softc *sc = device_private(ld->sc_dv);
+
+ switch (cmd) {
+ case DIOCCACHESYNC:
+ return sdmmc_mem_flush_cache(sc->sc_sf, poll);
+ default:
+ return EPASSTHROUGH;
+ }
+}
+
MODULE(MODULE_CLASS_DRIVER, ld_sdmmc, "ld");
#ifdef _MODULE
diff -r 241ab06b96d1 -r a381d4aee005 sys/dev/sdmmc/sdmmc_mem.c
--- a/sys/dev/sdmmc/sdmmc_mem.c Tue Jul 25 01:43:37 2017 +0000
+++ b/sys/dev/sdmmc/sdmmc_mem.c Tue Jul 25 01:49:13 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sdmmc_mem.c,v 1.56.4.2 2017/07/01 08:45:03 snj Exp $ */
+/* $NetBSD: sdmmc_mem.c,v 1.56.4.3 2017/07/25 01:49:13 snj Exp $ */
/* $OpenBSD: sdmmc_mem.c,v 1.10 2009/01/09 10:55:22 jsg Exp $ */
/*
@@ -45,7 +45,7 @@
/* Routines for SD/MMC memory cards. */
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdmmc_mem.c,v 1.56.4.2 2017/07/01 08:45:03 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdmmc_mem.c,v 1.56.4.3 2017/07/25 01:49:13 snj Exp $");
#ifdef _KERNEL_OPT
#include "opt_sdmmc.h"
@@ -87,7 +87,7 @@
static int sdmmc_set_bus_width(struct sdmmc_function *, int);
static int sdmmc_mem_sd_switch(struct sdmmc_function *, int, int, int, sdmmc_bitfield512_t *);
static int sdmmc_mem_mmc_switch(struct sdmmc_function *, uint8_t, uint8_t,
- uint8_t);
+ uint8_t, bool);
static int sdmmc_mem_signal_voltage(struct sdmmc_softc *, int);
static int sdmmc_mem_spi_read_ocr(struct sdmmc_softc *, uint32_t, uint32_t *);
static int sdmmc_mem_single_read_block(struct sdmmc_function *, uint32_t,
@@ -981,7 +981,7 @@
if (width != 1) {
error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL,
- EXT_CSD_BUS_WIDTH, value);
+ EXT_CSD_BUS_WIDTH, value, false);
if (error == 0)
error = sdmmc_chip_bus_width(sc->sc_sct,
sc->sc_sch, width);
@@ -1002,7 +1002,7 @@
}
if (hs_timing != EXT_CSD_HS_TIMING_LEGACY) {
error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL,
- EXT_CSD_HS_TIMING, hs_timing);
+ EXT_CSD_HS_TIMING, hs_timing, false);
if (error) {
aprint_error_dev(sc->sc_dev,
"can't change high speed %d, error %d\n",
@@ -1048,7 +1048,7 @@
error = sdmmc_mem_mmc_switch(sf,
EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
(width == 8) ? EXT_CSD_BUS_WIDTH_8_DDR :
- EXT_CSD_BUS_WIDTH_4_DDR);
+ EXT_CSD_BUS_WIDTH_4_DDR, false);
if (error) {
DPRINTF(("%s: can't switch to DDR"
" (%d bit)\n", SDMMCDEVNAME(sc), width));
@@ -1104,6 +1104,23 @@
sf->ext_csd.rst_n_function =
ext_csd[EXT_CSD_RST_N_FUNCTION];
}
+
+ if (sf->ext_csd.rev >= 6) {
+ sf->ext_csd.cache_size =
+ le32dec(&ext_csd[EXT_CSD_CACHE_SIZE]) * 1024;
+ }
+ if (sf->ext_csd.cache_size > 0) {
+ /* eMMC cache present, enable it */
+ error = sdmmc_mem_mmc_switch(sf,
+ EXT_CSD_CMD_SET_NORMAL, EXT_CSD_CACHE_CTRL,
+ EXT_CSD_CACHE_CTRL_CACHE_EN, false);
+ if (error) {
+ aprint_error_dev(sc->sc_dev,
+ "can't enable cache: %d\n", error);
+ } else {
+ SET(sf->flags, SFF_CACHE_ENABLED);
+ }
+ }
} else {
if (sc->sc_busclk > sf->csd.tran_speed)
sc->sc_busclk = sf->csd.tran_speed;
@@ -1600,7 +1617,7 @@
static int
sdmmc_mem_mmc_switch(struct sdmmc_function *sf, uint8_t set, uint8_t index,
- uint8_t value)
+ uint8_t value, bool poll)
{
struct sdmmc_softc *sc = sf->sc;
struct sdmmc_command cmd;
@@ -1612,6 +1629,9 @@
(index << 16) | (value << 8) | set;
cmd.c_flags = SCF_RSP_SPI_R1B | SCF_RSP_R1B | SCF_CMD_AC;
+ if (poll)
+ cmd.c_flags |= SCF_POLL;
+
error = sdmmc_mmc_command(sc, &cmd);
if (error)
return error;
@@ -1623,6 +1643,8 @@
if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE))
cmd.c_arg = MMC_ARG_RCA(sf->rca);
cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2;
+ if (poll)
+ cmd.c_flags |= SCF_POLL;
error = sdmmc_mmc_command(sc, &cmd);
if (error)
break;
@@ -2193,3 +2215,29 @@
return error;
}
+
+int
+sdmmc_mem_flush_cache(struct sdmmc_function *sf, bool poll)
+{
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