Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/netbsd-8]: src/sys/dev Pull up following revision(s) (requested by msait...
details: https://anonhg.NetBSD.org/src/rev/ce6a6d479b95
branches: netbsd-8
changeset: 850897:ce6a6d479b95
user: snj <snj%NetBSD.org@localhost>
date: Tue Aug 01 23:33:18 2017 +0000
description:
Pull up following revision(s) (requested by msaitoh in ticket #173):
sys/dev/pci/if_wmreg.h: 1.99-1.103
sys/dev/pci/if_wmvar.h: 1.34-1.37
sys/dev/pci/if_wm.c: 1.510-1.537
sys/dev/mii/ihphyreg.h: 1.2
sys/dev/mii/inbmphyreg.h: 1.10
sys/dev/mii/igphy.c: 1.27
Sync wm(4) up to if_wm.c rev. 1.537:
- Set WMREG_KABGTXD not in wm_init_locked() but in wm_reset().
- If a legacy interrupt is a spurious interrupt, don't print debug
message.
- Don't print the Image Unique ID if an NVM is iNVM (i210 and I211).
- Fix a bug that a RAL was written at incorrect address when the index
number is more than 16 on 82544 and newer.
- The layout of RAL on PCH* are different from others. Fix it.
- Flush every MTA write. Same as Linux.
- Move the location of calling wm_set_filter. Same as some other OSes.
- Flush writing WMREG_CTRL in wm_gmii_mediachange().
- Make new wm_phy_post_reset() and use this function at all location
after resetting phy.
- Add I219 specific workaround for legacy interrupt. From OpenBSD.
- Move the location of calling wm_lplu_d0_disable().
- Disable D0 LPLU on 8257[12356], 82580, I350 and I21[01], too. Before
this commit, above devices and non-PCIe devices accessed wrong
register.
- Fix latency calculation in wm_platform_pm_pch_lpt().
- Set OBFF water mark and enable OBFF on PCH_LPT and newer.
- Fix a bug that wm_gmii_i82544_{read,write}reg() didn't take care of
page select. PHY access from igphy() automatically did it, but
accessing from wm(4) for workaround didn't work correctly. This
change affects 8254[17], 8257[12] ICH8, ICH9 and ICH10.
- Call wm_kmrn_lock_loss_workaround_ich8lan() before any PHY access in
wm_linkintr_gmii().
- Register access in wm_kmrn_lock_loss_workaround_ich8lan() now works
correctly. Enable this function.
- IF TX is not required to flush, RX is also not required to flush in
wm_flush_desc_rings(). Same as other OSes.
- Remove wrong semaphore access in wm_nvm_{read,write}_{ich8,spt} to
prevent hangup. A semaphore is get/put in wm_nvm_{read,write}.
- Move some initialization stuff in wm_attach() before wm_reset().
Some flags and callback function is required to set correctly before
wm_reset() because wm_reset() and some helper functions refer them.
- Add wm_write_smbus_addr() to set SMBus address by software.
- Modify wm_gmii_hv_{read,write}reg_locked() to make them access
HV_SMB_ADDR correctly.
- Configure the LCD with the extended configuration region in NVM if
it's required. Tested with Thinkpad X220.
- 8257[12]: Don't directly access SPI but use EERD register.
- 82575-I354: If the size of SPI ROM >= 32K words, use direct SPI
access instead of EERD register access.
- Add wm_nvm_eec_clock_raise() and wm_nvm_eec_clock_lower() and use
them for Microwire/SPI bus control. Same as Linux and FreeBSD.
- Reduce timeout value for 80003 in wm_get_swfw_semaphore(). Same as
Linux and FreeBSD.
- Change API of kmrn_{read,write}reg() and check the return value.
- Check whether it's required to use MDIC workaround for 80003 or not
in wm_reset(). If the workaround isn't required, don't use the
workaround code in wm_gmii_i80003_{read,write}reg.
- Add WM_F_WA_I210_CLSEM flag for a workaround. FreeBSD/Linux drivers
say "In rare circumstances, the SW semaphore may already be held
unintentionally." on I21[01]. PXE boot is one of the case.
- Qemu's e1000e emulation (82574L)'s SPI has only 64 words. I've never
seen on real 82574 hardware with such small SPI ROM. Check
NVM word size before accessing higher address words to prevent
timeout.
- Check some wm_nvm_read()'s return vale.
- Use device_printf() instead of aprint_error_dev() for PHY read/write
functions because those are used not only in device attach.
- Print internal driver flags when attaching.
- Add debug printf()s.
- Rename variables.
- Add comment, update comment and remove wrong comment.
diffstat:
sys/dev/mii/igphy.c | 6 +-
sys/dev/mii/ihphyreg.h | 13 +-
sys/dev/mii/inbmphyreg.h | 4 +-
sys/dev/pci/if_wm.c | 1857 +++++++++++++++++++++++++++++----------------
sys/dev/pci/if_wmreg.h | 58 +-
sys/dev/pci/if_wmvar.h | 19 +-
6 files changed, 1283 insertions(+), 674 deletions(-)
diffs (truncated from 3506 to 300 lines):
diff -r 1967f7f85381 -r ce6a6d479b95 sys/dev/mii/igphy.c
--- a/sys/dev/mii/igphy.c Tue Aug 01 23:30:04 2017 +0000
+++ b/sys/dev/mii/igphy.c Tue Aug 01 23:33:18 2017 +0000
@@ -1,8 +1,8 @@
-/* $NetBSD: igphy.c,v 1.26 2016/07/07 06:55:41 msaitoh Exp $ */
+/* $NetBSD: igphy.c,v 1.26.10.1 2017/08/01 23:33:18 snj Exp $ */
/*
* The Intel copyright applies to the analog register setup, and the
- * (currently disabled) SmartSpeed workaround code.
+ * SmartSpeed workaround code.
*/
/*******************************************************************************
@@ -70,7 +70,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: igphy.c,v 1.26 2016/07/07 06:55:41 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: igphy.c,v 1.26.10.1 2017/08/01 23:33:18 snj Exp $");
#ifdef _KERNEL_OPT
#include "opt_mii.h"
diff -r 1967f7f85381 -r ce6a6d479b95 sys/dev/mii/ihphyreg.h
--- a/sys/dev/mii/ihphyreg.h Tue Aug 01 23:30:04 2017 +0000
+++ b/sys/dev/mii/ihphyreg.h Tue Aug 01 23:33:18 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ihphyreg.h,v 1.1 2010/11/27 20:15:27 christos Exp $ */
+/* $NetBSD: ihphyreg.h,v 1.1.56.1 2017/08/01 23:33:18 snj Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -108,4 +108,15 @@
/* Diagnostics Status Register */
#define IHPHY_MII_DSR BME1000_REG(0, 31)
+/*
+ * XXX I21[789] documents say that the SMBus Address register is at
+ * PHY address 01, Page 0 (not 768), Register 26.
+ */
+#define HV_SMB_ADDR BME1000_REG(768, 26)
+#define HV_SMB_ADDR_ADDR 0x007f
+#define HV_SMB_ADDR_VALID (1 << 7)
+#define HV_SMB_ADDR_FREQ_LOW (1 << 8)
+#define HV_SMB_ADDR_PEC_EN (1 << 9)
+#define HV_SMB_ADDR_FREQ_HIGH (1 << 12)
+
#endif /* _DEV_IHPHY_MIIREG_H_ */
diff -r 1967f7f85381 -r ce6a6d479b95 sys/dev/mii/inbmphyreg.h
--- a/sys/dev/mii/inbmphyreg.h Tue Aug 01 23:30:04 2017 +0000
+++ b/sys/dev/mii/inbmphyreg.h Tue Aug 01 23:33:18 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: inbmphyreg.h,v 1.9 2016/11/16 08:56:17 msaitoh Exp $ */
+/* $NetBSD: inbmphyreg.h,v 1.9.8.1 2017/08/01 23:33:18 snj Exp $ */
/*******************************************************************************
Copyright (c) 2001-2005, Intel Corporation
All rights reserved.
@@ -91,6 +91,8 @@
#define HV_OEM_BITS_A1KDIS (1 << 6)
#define HV_OEM_BITS_ANEGNOW (1 << 10)
+#define HV_LED_CONFIG BME1000_REG(0, 30)
+
#define HV_KMRN_MODE_CTRL BME1000_REG(BM_PORT_CTRL_PAGE, 16)
#define HV_KMRN_MDIO_SLOW 0x0400
diff -r 1967f7f85381 -r ce6a6d479b95 sys/dev/pci/if_wm.c
--- a/sys/dev/pci/if_wm.c Tue Aug 01 23:30:04 2017 +0000
+++ b/sys/dev/pci/if_wm.c Tue Aug 01 23:33:18 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_wm.c,v 1.508.4.1 2017/07/04 14:57:19 martin Exp $ */
+/* $NetBSD: if_wm.c,v 1.508.4.2 2017/08/01 23:33:18 snj Exp $ */
/*
* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -73,7 +73,6 @@
* TODO (in order of importance):
*
* - Check XXX'ed comments
- * - Disable D0 LPLU on 8257[12356], 82580 and I350.
* - TX Multi queue improvement (refine queue selection logic)
* - Split header buffer for newer descriptors
* - EEE (Energy Efficiency Ethernet)
@@ -84,7 +83,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.508.4.1 2017/07/04 14:57:19 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.508.4.2 2017/08/01 23:33:18 snj Exp $");
#ifdef _KERNEL_OPT
#include "opt_net_mpsafe.h"
@@ -135,6 +134,7 @@
#include <dev/mii/igphyreg.h>
#include <dev/mii/igphyvar.h>
#include <dev/mii/inbmphyreg.h>
+#include <dev/mii/ihphyreg.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
@@ -442,6 +442,12 @@
int reset_delay_us;
};
+struct wm_nvmop {
+ int (*acquire)(struct wm_softc *);
+ void (*release)(struct wm_softc *);
+ int (*read)(struct wm_softc *, int, int, uint16_t *);
+};
+
/*
* Software state per device.
*/
@@ -564,6 +570,7 @@
kmutex_t *sc_ich_nvmmtx; /* ICH/PCH specific NVM mutex */
struct wm_phyop phy;
+ struct wm_nvmop nvm;
};
#define WM_CORE_LOCK(_sc) if ((_sc)->sc_core_lock) mutex_enter((_sc)->sc_core_lock)
@@ -679,6 +686,9 @@
static void wm_get_auto_rd_done(struct wm_softc *);
static void wm_lan_init_done(struct wm_softc *);
static void wm_get_cfg_done(struct wm_softc *);
+static void wm_phy_post_reset(struct wm_softc *);
+static void wm_write_smbus_addr(struct wm_softc *);
+static void wm_init_lcd_from_nvm(struct wm_softc *);
static void wm_initialize_hardware_bits(struct wm_softc *);
static uint32_t wm_rxpbs_adjust_82580(uint32_t);
static void wm_reset_phy(struct wm_softc *);
@@ -696,8 +706,8 @@
static int wm_setup_msix(struct wm_softc *);
static int wm_init(struct ifnet *);
static int wm_init_locked(struct ifnet *);
-static void wm_turnon(struct wm_softc *);
-static void wm_turnoff(struct wm_softc *);
+static void wm_unset_stopping_flags(struct wm_softc *);
+static void wm_set_stopping_flags(struct wm_softc *);
static void wm_stop(struct ifnet *, int);
static void wm_stop_locked(struct ifnet *, int);
static void wm_dump_mbuf_chain(struct wm_softc *, struct mbuf *);
@@ -799,10 +809,10 @@
* These functions are not for accessing MII registers but for accessing
* kumeran specific registers.
*/
-static int wm_kmrn_readreg(struct wm_softc *, int);
-static int wm_kmrn_readreg_locked(struct wm_softc *, int);
-static void wm_kmrn_writereg(struct wm_softc *, int, int);
-static void wm_kmrn_writereg_locked(struct wm_softc *, int, int);
+static int wm_kmrn_readreg(struct wm_softc *, int, uint16_t *);
+static int wm_kmrn_readreg_locked(struct wm_softc *, int, uint16_t *);
+static int wm_kmrn_writereg(struct wm_softc *, int, uint16_t);
+static int wm_kmrn_writereg_locked(struct wm_softc *, int, uint16_t);
/* SGMII */
static bool wm_sgmii_uses_mdio(struct wm_softc *);
static int wm_sgmii_readreg(device_t, int, int);
@@ -854,8 +864,6 @@
static int wm_nvm_read_word_invm(struct wm_softc *, uint16_t, uint16_t *);
static int wm_nvm_read_invm(struct wm_softc *, int, int, uint16_t *);
/* Lock, detecting NVM type, validate checksum and read */
-static int wm_nvm_acquire(struct wm_softc *);
-static void wm_nvm_release(struct wm_softc *);
static int wm_nvm_is_onboard_eeprom(struct wm_softc *);
static int wm_nvm_get_flash_presence_i210(struct wm_softc *);
static int wm_nvm_validate_checksum(struct wm_softc *);
@@ -869,17 +877,23 @@
*/
static int wm_get_null(struct wm_softc *);
static void wm_put_null(struct wm_softc *);
+static int wm_get_eecd(struct wm_softc *);
+static void wm_put_eecd(struct wm_softc *);
static int wm_get_swsm_semaphore(struct wm_softc *); /* 8257[123] */
static void wm_put_swsm_semaphore(struct wm_softc *);
static int wm_get_swfw_semaphore(struct wm_softc *, uint16_t);
static void wm_put_swfw_semaphore(struct wm_softc *, uint16_t);
+static int wm_get_nvm_80003(struct wm_softc *);
+static void wm_put_nvm_80003(struct wm_softc *);
+static int wm_get_nvm_82571(struct wm_softc *);
+static void wm_put_nvm_82571(struct wm_softc *);
static int wm_get_phy_82575(struct wm_softc *);
static void wm_put_phy_82575(struct wm_softc *);
static int wm_get_swfwhw_semaphore(struct wm_softc *); /* For 574/583 */
static void wm_put_swfwhw_semaphore(struct wm_softc *);
static int wm_get_swflag_ich8lan(struct wm_softc *); /* For PHY */
static void wm_put_swflag_ich8lan(struct wm_softc *);
-static int wm_get_nvm_ich8lan(struct wm_softc *); /* For NVM */
+static int wm_get_nvm_ich8lan(struct wm_softc *);
static void wm_put_nvm_ich8lan(struct wm_softc *);
static int wm_get_hw_semaphore_82573(struct wm_softc *);
static void wm_put_hw_semaphore_82573(struct wm_softc *);
@@ -909,7 +923,6 @@
static void wm_enable_wakeup(struct wm_softc *);
/* LPLU (Low Power Link Up) */
static void wm_lplu_d0_disable(struct wm_softc *);
-static void wm_lplu_d0_disable_pch(struct wm_softc *);
/* EEE */
static void wm_set_eee_i350(struct wm_softc *);
@@ -930,6 +943,7 @@
static void wm_toggle_lanphypc_pch_lpt(struct wm_softc *);
static int wm_platform_pm_pch_lpt(struct wm_softc *, bool);
static void wm_pll_workaround_i210(struct wm_softc *);
+static void wm_legacy_irq_quirk_spt(struct wm_softc *);
CFATTACH_DECL3_NEW(wm, sizeof(struct wm_softc),
wm_match, wm_attach, wm_detach, NULL, NULL, NULL, DVF_DETACH_SHUTDOWN);
@@ -1674,6 +1688,7 @@
prop_data_t ea;
prop_number_t pn;
uint8_t enaddr[ETHER_ADDR_LEN];
+ char buf[256];
uint16_t cfg1, cfg2, swdpin, nvmword;
pcireg_t preg, memtype;
uint16_t eeprom_data, apme_mask;
@@ -1709,8 +1724,8 @@
sc->sc_type = wmp->wmp_type;
/* Set default function pointers */
- sc->phy.acquire = wm_get_null;
- sc->phy.release = wm_put_null;
+ sc->phy.acquire = sc->nvm.acquire = wm_get_null;
+ sc->phy.release = sc->nvm.release = wm_put_null;
sc->phy.reset_delay_us = (sc->sc_type >= WM_T_82571) ? 100 : 10000;
if (sc->sc_type < WM_T_82543) {
@@ -2035,6 +2050,7 @@
case WM_T_82543:
case WM_T_82544:
/* Microwire */
+ sc->nvm.read = wm_nvm_read_uwire;
sc->sc_nvm_wordsize = 64;
sc->sc_nvm_addrbits = 6;
break;
@@ -2044,6 +2060,7 @@
case WM_T_82546:
case WM_T_82546_3:
/* Microwire */
+ sc->nvm.read = wm_nvm_read_uwire;
reg = CSR_READ(sc, WMREG_EECD);
if (reg & EECD_EE_SIZE) {
sc->sc_nvm_wordsize = 256;
@@ -2053,19 +2070,29 @@
sc->sc_nvm_addrbits = 6;
}
sc->sc_flags |= WM_F_LOCK_EECD;
+ sc->nvm.acquire = wm_get_eecd;
+ sc->nvm.release = wm_put_eecd;
break;
case WM_T_82541:
case WM_T_82541_2:
case WM_T_82547:
case WM_T_82547_2:
+ reg = CSR_READ(sc, WMREG_EECD);
+ /*
+ * wm_nvm_set_addrbits_size_eecd() accesses SPI in it only
+ * on 8254[17], so set flags and functios before calling it.
+ */
sc->sc_flags |= WM_F_LOCK_EECD;
- reg = CSR_READ(sc, WMREG_EECD);
+ sc->nvm.acquire = wm_get_eecd;
+ sc->nvm.release = wm_put_eecd;
if (reg & EECD_EE_TYPE) {
/* SPI */
+ sc->nvm.read = wm_nvm_read_spi;
sc->sc_flags |= WM_F_EEPROM_SPI;
wm_nvm_set_addrbits_size_eecd(sc);
} else {
/* Microwire */
+ sc->nvm.read = wm_nvm_read_uwire;
if ((reg & EECD_EE_ABITS) != 0) {
sc->sc_nvm_wordsize = 256;
sc->sc_nvm_addrbits = 8;
@@ -2078,25 +2105,30 @@
case WM_T_82571:
case WM_T_82572:
/* SPI */
+ sc->nvm.read = wm_nvm_read_eerd;
+ /* Not use WM_F_LOCK_EECD because we use EERD */
sc->sc_flags |= WM_F_EEPROM_SPI;
wm_nvm_set_addrbits_size_eecd(sc);
- sc->sc_flags |= WM_F_LOCK_EECD | WM_F_LOCK_SWSM;
sc->phy.acquire = wm_get_swsm_semaphore;
sc->phy.release = wm_put_swsm_semaphore;
+ sc->nvm.acquire = wm_get_nvm_82571;
+ sc->nvm.release = wm_put_nvm_82571;
break;
case WM_T_82573:
case WM_T_82574:
case WM_T_82583:
+ sc->nvm.read = wm_nvm_read_eerd;
+ /* Not use WM_F_LOCK_EECD because we use EERD */
if (sc->sc_type == WM_T_82573) {
- sc->sc_flags |= WM_F_LOCK_SWSM;
sc->phy.acquire = wm_get_swsm_semaphore;
sc->phy.release = wm_put_swsm_semaphore;
+ sc->nvm.acquire = wm_get_nvm_82571;
+ sc->nvm.release = wm_put_nvm_82571;
} else {
- sc->sc_flags |= WM_F_LOCK_EXTCNF;
Home |
Main Index |
Thread Index |
Old Index