[src/trunk]: src/sys/arch/mips/mips vaddr_t -> register_t in range cache ops

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/d736fafa77f8
branches:  trunk
changeset: 818361:d736fafa77f8
user:      skrll <skrll%NetBSD.org@localhost>
date:      Mon Oct 10 07:37:17 2016 +0000

description:
vaddr_t -> register_t in range cache ops

diffstat:

 sys/arch/mips/mips/cache_r5k.c |  8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diffs (36 lines):

diff -r d41dafe80b00 -r d736fafa77f8 sys/arch/mips/mips/cache_r5k.c
--- a/sys/arch/mips/mips/cache_r5k.c    Mon Oct 10 01:22:51 2016 +0000
+++ b/sys/arch/mips/mips/cache_r5k.c    Mon Oct 10 07:37:17 2016 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache_r5k.c,v 1.17 2016/10/08 00:39:53 macallan Exp $  */
+/*     $NetBSD: cache_r5k.c,v 1.18 2016/10/10 07:37:17 skrll Exp $     */
 
 /*
  * Copyright 2001 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cache_r5k.c,v 1.17 2016/10/08 00:39:53 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cache_r5k.c,v 1.18 2016/10/10 07:37:17 skrll Exp $");
 
 #include <sys/param.h>
 
@@ -287,7 +287,7 @@
 void
 r4600v1_pdcache_inv_range_32(register_t va, vsize_t size)
 {
-       const vaddr_t eva = round_line32(va + size);
+       const register_t eva = round_line32(va + size);
 
        /*
         * This is pathetically slow, but the chip bug is pretty
@@ -313,7 +313,7 @@
 void
 r4600v2_pdcache_inv_range_32(register_t va, vsize_t size)
 {
-       const vaddr_t eva = round_line32(va + size);
+       const register_t eva = round_line32(va + size);
 
        va = trunc_line32(va);