[src/trunk]: src/sys/arch/arm/arm set ttbr0/1 using correct register(r2).

[hsuenaga <hsuenaga%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/34e7440d3914
branches:  trunk
changeset: 807026:34e7440d3914
user:      hsuenaga <hsuenaga%NetBSD.org@localhost>
date:      Thu Mar 26 08:50:42 2015 +0000

description:
set ttbr0/1 using correct register(r2).

diffstat:

 sys/arch/arm/arm/cpufunc_asm_pj4b.S |  6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diffs (22 lines):

diff -r 6745506e4ea3 -r 34e7440d3914 sys/arch/arm/arm/cpufunc_asm_pj4b.S
--- a/sys/arch/arm/arm/cpufunc_asm_pj4b.S       Thu Mar 26 08:45:05 2015 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_pj4b.S       Thu Mar 26 08:50:42 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc_asm_pj4b.S,v 1.5 2014/10/29 16:22:31 skrll Exp $ */
+/*     $NetBSD: cpufunc_asm_pj4b.S,v 1.6 2015/03/26 08:50:42 hsuenaga Exp $ */
 
 /*******************************************************************************
 Copyright (C) Marvell International Ltd. and its affiliates
@@ -58,10 +58,10 @@
 #else
        bic     r2, r0, #0x18
 #endif
-       mcr     p15, 0, r0, c2, c0, 0   /* load TTBR0 */
+       mcr     p15, 0, r2, c2, c0, 0   /* load TTBR0 */
 #ifdef ARM_MMU_EXTENDED
        cmp     r1, #0
-       mcreq   p15, 0, r0, c2, c0, 1   /* load TTBR1 */
+       mcreq   p15, 0, r2, c2, c0, 1   /* load TTBR1 */
 #else
        mov     r0, #0
        mcr     p15, 0, r0, c8, c7, 0   /* invalidate I+D TLBs */