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[src/trunk]: src/sys/arch Drop NENTRY() from the x86 kernels, use ENTRY(). Wi...
details: https://anonhg.NetBSD.org/src/rev/90bb01348872
branches: trunk
changeset: 833826:90bb01348872
user: maxv <maxv%NetBSD.org@localhost>
date: Sat Jul 14 14:29:40 2018 +0000
description:
Drop NENTRY() from the x86 kernels, use ENTRY(). With PMCs (and other hardware
tracing facilities) we have a much better ways of monitoring the CPU activity
than GPROF, without software modification.
Also I think GPROF has never worked, because the 'start' functions of both
i386 and amd64 use ENTRY(), and it would have caused a function call while the
kernel was not yet relocated.
diffstat:
sys/arch/amd64/acpi/acpi_wakeup_low.S | 6 +++---
sys/arch/amd64/amd64/amd64_trap.S | 4 ++--
sys/arch/amd64/amd64/copy.S | 10 +++++-----
sys/arch/amd64/amd64/cpufunc.S | 6 +++---
sys/arch/amd64/amd64/linux32_sigcode.S | 6 +++---
sys/arch/amd64/amd64/lock_stubs.S | 6 +++---
sys/arch/amd64/amd64/locore.S | 6 +++---
sys/arch/amd64/amd64/netbsd32_sigcode.S | 4 ++--
sys/arch/amd64/amd64/spl.S | 6 +++---
sys/arch/amd64/amd64/vector.S | 6 +++---
sys/arch/amd64/stand/prekern/trap.S | 4 ++--
sys/arch/i386/i386/bioscall.S | 6 +++---
sys/arch/i386/i386/copy.S | 32 ++++++++++++++++----------------
sys/arch/i386/i386/cpufunc.S | 6 +++---
sys/arch/i386/i386/i386_trap.S | 6 +++---
sys/arch/i386/i386/linux_sigcode.S | 8 ++++----
sys/arch/i386/i386/lock_stubs.S | 6 +++---
sys/arch/i386/i386/locore.S | 12 ++++++------
sys/arch/i386/i386/vector.S | 8 ++++----
sys/arch/i386/pnpbios/pnpbioscall.S | 8 ++++----
20 files changed, 78 insertions(+), 78 deletions(-)
diffs (truncated from 682 to 300 lines):
diff -r 7a4ded2d29c7 -r 90bb01348872 sys/arch/amd64/acpi/acpi_wakeup_low.S
--- a/sys/arch/amd64/acpi/acpi_wakeup_low.S Sat Jul 14 07:54:37 2018 +0000
+++ b/sys/arch/amd64/acpi/acpi_wakeup_low.S Sat Jul 14 14:29:40 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_wakeup_low.S,v 1.9 2017/11/01 09:47:53 maxv Exp $ */
+/* $NetBSD: acpi_wakeup_low.S,v 1.10 2018/07/14 14:29:40 maxv Exp $ */
/*
* Copyright (c) 2007 Joerg Sonnenberger <joerg%netbsd.org@localhost>
@@ -36,7 +36,7 @@
.text
.p2align 2, 0x90
-NENTRY(acpi_md_sleep_exit)
+ENTRY(acpi_md_sleep_exit)
lgdt ACPI_SUSPEND_GDT(%r8)
/* Reload fixed descriptors for new GDT */
@@ -113,7 +113,7 @@
END(acpi_md_sleep_exit)
.p2align 2, 0x90
-NENTRY(acpi_md_sleep_prepare)
+ENTRY(acpi_md_sleep_prepare)
movq CPUVAR(SELF),%r8
movq %rbx,ACPI_SUSPEND_REG+(1*8)(%r8)
movq %rbp,ACPI_SUSPEND_REG+(2*8)(%r8)
diff -r 7a4ded2d29c7 -r 90bb01348872 sys/arch/amd64/amd64/amd64_trap.S
--- a/sys/arch/amd64/amd64/amd64_trap.S Sat Jul 14 07:54:37 2018 +0000
+++ b/sys/arch/amd64/amd64/amd64_trap.S Sat Jul 14 14:29:40 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: amd64_trap.S,v 1.43 2018/07/12 19:48:16 maxv Exp $ */
+/* $NetBSD: amd64_trap.S,v 1.44 2018/07/14 14:29:40 maxv Exp $ */
/*
* Copyright (c) 1998, 2007, 2008, 2017 The NetBSD Foundation, Inc.
@@ -626,7 +626,7 @@
* All traps go through here. Call the generic trap handler, and
* check for ASTs afterwards.
*/
-NENTRY(alltraps)
+ENTRY(alltraps)
INTRENTRY
.Lalltraps_noentry:
STI(si)
diff -r 7a4ded2d29c7 -r 90bb01348872 sys/arch/amd64/amd64/copy.S
--- a/sys/arch/amd64/amd64/copy.S Sat Jul 14 07:54:37 2018 +0000
+++ b/sys/arch/amd64/amd64/copy.S Sat Jul 14 14:29:40 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: copy.S,v 1.29 2018/01/07 12:42:46 maxv Exp $ */
+/* $NetBSD: copy.S,v 1.30 2018/07/14 14:29:40 maxv Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -236,16 +236,16 @@
DEFERRED_SWITCH_CALL
END(copyin)
-NENTRY(copy_efault)
+ENTRY(copy_efault)
movq $EFAULT,%rax
ret
END(copy_efault)
-NENTRY(kcopy_fault)
+ENTRY(kcopy_fault)
ret
END(kcopy_fault)
-NENTRY(copy_fault)
+ENTRY(copy_fault)
SMAP_ENABLE
ret
END(copy_fault)
@@ -547,7 +547,7 @@
ret
END(ucas_efault)
-NENTRY(ucas_fault)
+ENTRY(ucas_fault)
SMAP_ENABLE
ret
END(ucas_fault)
diff -r 7a4ded2d29c7 -r 90bb01348872 sys/arch/amd64/amd64/cpufunc.S
--- a/sys/arch/amd64/amd64/cpufunc.S Sat Jul 14 07:54:37 2018 +0000
+++ b/sys/arch/amd64/amd64/cpufunc.S Sat Jul 14 14:29:40 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.S,v 1.31 2017/11/01 09:17:28 maxv Exp $ */
+/* $NetBSD: cpufunc.S,v 1.32 2018/07/14 14:29:40 maxv Exp $ */
/*
* Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -344,7 +344,7 @@
/*
* MSR operations fault handler
*/
-NENTRY(msr_onfault)
+ENTRY(msr_onfault)
movq CPUVAR(CURLWP), %r8
movq L_PCB(%r8), %r8
movq $0, PCB_ONFAULT(%r8)
@@ -499,7 +499,7 @@
ret
END(x86_mwait)
-NENTRY(x86_pause)
+ENTRY(x86_pause)
pause
ret
END(x86_pause)
diff -r 7a4ded2d29c7 -r 90bb01348872 sys/arch/amd64/amd64/linux32_sigcode.S
--- a/sys/arch/amd64/amd64/linux32_sigcode.S Sat Jul 14 07:54:37 2018 +0000
+++ b/sys/arch/amd64/amd64/linux32_sigcode.S Sat Jul 14 14:29:40 2018 +0000
@@ -1,10 +1,10 @@
-/* $NetBSD: linux32_sigcode.S,v 1.5 2017/11/01 09:38:43 maxv Exp $ */
+/* $NetBSD: linux32_sigcode.S,v 1.6 2018/07/14 14:29:40 maxv Exp $ */
#include "assym.h"
#include <machine/asm.h>
.code32
-NENTRY(linux32_sigcode)
+ENTRY(linux32_sigcode)
call *LINUX32_SF_HANDLER(%esp)
leal LINUX32_SF_SC(%esp),%ebx /* scp */
pushl %eax
@@ -15,7 +15,7 @@
END(linux32_sigcode)
.balign 16
-NENTRY(linux32_rt_sigcode)
+ENTRY(linux32_rt_sigcode)
call *LINUX32_RT_SF_HANDLER(%esp)
leal LINUX32_RT_SF_UC(%esp),%ebx /* scp */
pushl %eax
diff -r 7a4ded2d29c7 -r 90bb01348872 sys/arch/amd64/amd64/lock_stubs.S
--- a/sys/arch/amd64/amd64/lock_stubs.S Sat Jul 14 07:54:37 2018 +0000
+++ b/sys/arch/amd64/amd64/lock_stubs.S Sat Jul 14 14:29:40 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: lock_stubs.S,v 1.28 2018/01/07 13:43:23 maxv Exp $ */
+/* $NetBSD: lock_stubs.S,v 1.29 2018/07/14 14:29:40 maxv Exp $ */
/*-
* Copyright (c) 2006, 2007, 2008, 2009 The NetBSD Foundation, Inc.
@@ -307,7 +307,7 @@
ret
END(__cpu_simple_lock_init)
-NENTRY(__cpu_simple_lock)
+ENTRY(__cpu_simple_lock)
movl $0x0100, %eax
1:
LOCK(6)
@@ -324,7 +324,7 @@
jmp 2b
END(__cpu_simple_lock)
-NENTRY(__cpu_simple_unlock)
+ENTRY(__cpu_simple_unlock)
movb $0, (%rdi)
ret
END(__cpu_simple_unlock)
diff -r 7a4ded2d29c7 -r 90bb01348872 sys/arch/amd64/amd64/locore.S
--- a/sys/arch/amd64/amd64/locore.S Sat Jul 14 07:54:37 2018 +0000
+++ b/sys/arch/amd64/amd64/locore.S Sat Jul 14 14:29:40 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.170 2018/07/12 19:48:16 maxv Exp $ */
+/* $NetBSD: locore.S,v 1.171 2018/07/14 14:29:40 maxv Exp $ */
/*
* Copyright-o-rama!
@@ -1278,7 +1278,7 @@
/*
* Syscall handler.
*/
-NENTRY(handle_syscall)
+ENTRY(handle_syscall)
STI(si)
movq CPUVAR(CURLWP),%r14
@@ -1356,7 +1356,7 @@
* This is a trampoline function pushed run by newly created LWPs
* in order to do additional setup in their context.
*/
-NENTRY(lwp_trampoline)
+ENTRY(lwp_trampoline)
movq %rbp,%rsi
movq %rbp,%r14 /* for .Lsyscall_checkast */
movq %rax,%rdi
diff -r 7a4ded2d29c7 -r 90bb01348872 sys/arch/amd64/amd64/netbsd32_sigcode.S
--- a/sys/arch/amd64/amd64/netbsd32_sigcode.S Sat Jul 14 07:54:37 2018 +0000
+++ b/sys/arch/amd64/amd64/netbsd32_sigcode.S Sat Jul 14 14:29:40 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: netbsd32_sigcode.S,v 1.8 2017/11/01 09:38:43 maxv Exp $ */
+/* $NetBSD: netbsd32_sigcode.S,v 1.9 2018/07/14 14:29:40 maxv Exp $ */
/*
* Copyright (c) 1998, 2000 The NetBSD Foundation, Inc.
@@ -37,7 +37,7 @@
* Signal trampoline for 1.6 compatibility; copied to top of user stack.
*/
.code32
-NENTRY(netbsd32_sigcode)
+ENTRY(netbsd32_sigcode)
/*
* Handler has returned here as if we called it. The sigcontext
* is on the stack after the 3 args "we" pushed.
diff -r 7a4ded2d29c7 -r 90bb01348872 sys/arch/amd64/amd64/spl.S
--- a/sys/arch/amd64/amd64/spl.S Sat Jul 14 07:54:37 2018 +0000
+++ b/sys/arch/amd64/amd64/spl.S Sat Jul 14 14:29:40 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: spl.S,v 1.34 2018/04/04 22:52:58 christos Exp $ */
+/* $NetBSD: spl.S,v 1.35 2018/07/14 14:29:40 maxv Exp $ */
/*
* Copyright (c) 2003 Wasabi Systems, Inc.
@@ -137,7 +137,7 @@
*
* %rax prevlwp from cpu_switchto()
*/
-NENTRY(softintr_ret)
+ENTRY(softintr_ret)
incl CPUVAR(MTX_COUNT) /* re-adjust after mi_switch */
movl $0,L_CTXSWTCH(%rax) /* %rax from cpu_switchto */
cli
@@ -149,7 +149,7 @@
*
* Software interrupt registration.
*/
-NENTRY(softint_trigger)
+ENTRY(softint_trigger)
orl %edi,CPUVAR(IPENDING) /* atomic on local cpu */
ret
END(softint_trigger)
diff -r 7a4ded2d29c7 -r 90bb01348872 sys/arch/amd64/amd64/vector.S
--- a/sys/arch/amd64/amd64/vector.S Sat Jul 14 07:54:37 2018 +0000
+++ b/sys/arch/amd64/amd64/vector.S Sat Jul 14 14:29:40 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vector.S,v 1.63 2018/06/20 11:45:25 maxv Exp $ */
+/* $NetBSD: vector.S,v 1.64 2018/07/14 14:29:40 maxv Exp $ */
/*
* Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -755,7 +755,7 @@
*/
/* Hypervisor callback */
-NENTRY(hypervisor_callback)
+ENTRY(hypervisor_callback)
movq (%rsp),%rcx
movq 8(%rsp),%r11
addq $16,%rsp
@@ -773,7 +773,7 @@
END(hypervisor_callback)
/* Panic? */
-NENTRY(failsafe_callback)
+ENTRY(failsafe_callback)
movq (%rsp),%rcx
movq 8(%rsp),%r11
addq $16,%rsp
diff -r 7a4ded2d29c7 -r 90bb01348872 sys/arch/amd64/stand/prekern/trap.S
--- a/sys/arch/amd64/stand/prekern/trap.S Sat Jul 14 07:54:37 2018 +0000
+++ b/sys/arch/amd64/stand/prekern/trap.S Sat Jul 14 14:29:40 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.S,v 1.3 2018/05/25 15:52:11 maxv Exp $ */
+/* $NetBSD: trap.S,v 1.4 2018/07/14 14:29:40 maxv Exp $ */
/*
* Copyright (c) 2017 The NetBSD Foundation, Inc. All rights reserved.
@@ -167,7 +167,7 @@
* sf_rsp
* sf_ss
*/
-NENTRY(alltraps)
+ENTRY(alltraps)
movq %rsp,%rdi
call _C_LABEL(trap)
/* NOTREACHED */
diff -r 7a4ded2d29c7 -r 90bb01348872 sys/arch/i386/i386/bioscall.S
--- a/sys/arch/i386/i386/bioscall.S Sat Jul 14 07:54:37 2018 +0000
+++ b/sys/arch/i386/i386/bioscall.S Sat Jul 14 14:29:40 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bioscall.S,v 1.9 2010/07/24 00:45:54 jym Exp $ */
+/* $NetBSD: bioscall.S,v 1.10 2018/07/14 14:29:40 maxv Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: bioscall.S,v 1.9 2010/07/24 00:45:54 jym Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bioscall.S,v 1.10 2018/07/14 14:29:40 maxv Exp $");
#include <machine/bioscall.h>
@@ -63,7 +63,7 @@
* Fills in *regs with registers as returned by BIOS.
*/
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