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[src/trunk]: src/sys/arch fix FPU initialization on Xen to allow e.g. AVX whe...



details:   https://anonhg.NetBSD.org/src/rev/7723f6e34310
branches:  trunk
changeset: 833306:7723f6e34310
user:      jdolecek <jdolecek%NetBSD.org@localhost>
date:      Tue Jun 19 19:50:19 2018 +0000

description:
fix FPU initialization on Xen to allow e.g. AVX when supported by hardware;
only use XSAVE when the the CPUID OSXSAVE bit is set, as this seems to be
reliable indication

tested with Xen 4.2.6 DOM0/DOMU on Intel CPU, without and with no-xsave flag,
so should work also on those AMD CPUs, which have XSAVE disabled by default;
also tested with Xen DOM0 4.8.3

fixes PR kern/50332 by Torbjorn Granlund; sorry it took three years to address

XXX pullup netbsd-8

diffstat:

 sys/arch/x86/include/fpu.h  |   4 +-
 sys/arch/x86/x86/cpu.c      |   6 ++--
 sys/arch/x86/x86/fpu.c      |  16 ++++++++------
 sys/arch/x86/x86/identcpu.c |   9 +------
 sys/arch/xen/x86/cpu.c      |  50 ++++++++++++++++++++++++++++++++++++++++----
 5 files changed, 61 insertions(+), 24 deletions(-)

diffs (205 lines):

diff -r 7d02e5056a5e -r 7723f6e34310 sys/arch/x86/include/fpu.h
--- a/sys/arch/x86/include/fpu.h        Tue Jun 19 15:13:51 2018 +0000
+++ b/sys/arch/x86/include/fpu.h        Tue Jun 19 19:50:19 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fpu.h,v 1.9 2018/06/14 14:36:46 maxv Exp $     */
+/*     $NetBSD: fpu.h,v 1.10 2018/06/19 19:50:19 jdolecek Exp $        */
 
 #ifndef        _X86_FPU_H_
 #define        _X86_FPU_H_
@@ -12,7 +12,7 @@
 struct trapframe;
 
 void fpuinit(struct cpu_info *);
-void fpuinit_mxcsr_mask(void);
+void fpuinit_mxcsr_mask(uint32_t);
 void fpusave_lwp(struct lwp *, bool);
 void fpusave_cpu(bool);
 
diff -r 7d02e5056a5e -r 7723f6e34310 sys/arch/x86/x86/cpu.c
--- a/sys/arch/x86/x86/cpu.c    Tue Jun 19 15:13:51 2018 +0000
+++ b/sys/arch/x86/x86/cpu.c    Tue Jun 19 19:50:19 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.c,v 1.155 2018/04/05 08:43:07 maxv Exp $   */
+/*     $NetBSD: cpu.c,v 1.156 2018/06/19 19:50:19 jdolecek Exp $       */
 
 /*
  * Copyright (c) 2000-2012 NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.155 2018/04/05 08:43:07 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.156 2018/06/19 19:50:19 jdolecek Exp $");
 
 #include "opt_ddb.h"
 #include "opt_mpbios.h"                /* for MPDEBUG */
@@ -638,7 +638,7 @@
        }
 
        if (x86_fpu_save >= FPU_SAVE_FXSAVE) {
-               fpuinit_mxcsr_mask();
+               fpuinit_mxcsr_mask(cr4);
        }
 
        /* If xsave is enabled, enable all fpu features */
diff -r 7d02e5056a5e -r 7723f6e34310 sys/arch/x86/x86/fpu.c
--- a/sys/arch/x86/x86/fpu.c    Tue Jun 19 15:13:51 2018 +0000
+++ b/sys/arch/x86/x86/fpu.c    Tue Jun 19 19:50:19 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fpu.c,v 1.39 2018/06/19 09:25:13 maxv Exp $    */
+/*     $NetBSD: fpu.c,v 1.40 2018/06/19 19:50:19 jdolecek Exp $        */
 
 /*
  * Copyright (c) 2008 The NetBSD Foundation, Inc.  All
@@ -96,7 +96,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.39 2018/06/19 09:25:13 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.40 2018/06/19 19:50:19 jdolecek Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -237,9 +237,14 @@
  * Get the value of MXCSR_MASK supported by the CPU.
  */
 void
-fpuinit_mxcsr_mask(void)
+fpuinit_mxcsr_mask(uint32_t cr4)
 {
-#ifndef XEN
+
+       if ((cr4 & CR4_OSXSAVE) == 0) {
+               x86_fpu_mxcsr_mask = __INITIAL_MXCSR_MASK__;
+               return;
+       }
+
        union savefpu fpusave __aligned(16);
        u_long psl;
 
@@ -262,9 +267,6 @@
        } else {
                x86_fpu_mxcsr_mask = fpusave.sv_xmm.fx_mxcsr_mask;
        }
-#else
-       x86_fpu_mxcsr_mask = __INITIAL_MXCSR_MASK__;
-#endif
 }
 
 static void
diff -r 7d02e5056a5e -r 7723f6e34310 sys/arch/x86/x86/identcpu.c
--- a/sys/arch/x86/x86/identcpu.c       Tue Jun 19 15:13:51 2018 +0000
+++ b/sys/arch/x86/x86/identcpu.c       Tue Jun 19 19:50:19 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: identcpu.c,v 1.72 2018/06/17 07:13:02 maxv Exp $       */
+/*     $NetBSD: identcpu.c,v 1.73 2018/06/19 19:50:19 jdolecek Exp $   */
 
 /*-
  * Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.72 2018/06/17 07:13:02 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.73 2018/06/19 19:50:19 jdolecek Exp $");
 
 #include "opt_xen.h"
 
@@ -819,12 +819,7 @@
        if (descs[2] > 512)
                x86_fpu_save_size = descs[2];
 
-#ifdef XEN
-       /* Don't use xsave, force fxsave with x86_xsave_features = 0. */
-       x86_fpu_save = FPU_SAVE_FXSAVE;
-#else
        x86_xsave_features = (uint64_t)descs[3] << 32 | descs[0];
-#endif
 }
 
 void
diff -r 7d02e5056a5e -r 7723f6e34310 sys/arch/xen/x86/cpu.c
--- a/sys/arch/xen/x86/cpu.c    Tue Jun 19 15:13:51 2018 +0000
+++ b/sys/arch/xen/x86/cpu.c    Tue Jun 19 19:50:19 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.c,v 1.117 2018/01/13 14:48:13 bouyer Exp $ */
+/*     $NetBSD: cpu.c,v 1.118 2018/06/19 19:50:19 jdolecek Exp $       */
 
 /*-
  * Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.117 2018/01/13 14:48:13 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.118 2018/06/19 19:50:19 jdolecek Exp $");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -527,22 +527,62 @@
 void
 cpu_init(struct cpu_info *ci)
 {
+       uint32_t cr4 = 0;
 
        /*
         * If we have FXSAVE/FXRESTOR, use them.
         */
        if (cpu_feature[0] & CPUID_FXSR) {
-               lcr4(rcr4() | CR4_OSFXSR);
+               cr4 |= CR4_OSFXSR;
 
                /*
                 * If we have SSE/SSE2, enable XMM exceptions.
                 */
                if (cpu_feature[0] & (CPUID_SSE|CPUID_SSE2))
-                       lcr4(rcr4() | CR4_OSXMMEXCPT);
+                       cr4 |= CR4_OSXMMEXCPT;
+       }
+
+       /*
+        * Xen kernel sets OSXSAVE if appropriate for the hardware,
+        * or disables it with no-xsave flag or due to security bugs with
+        * particular CPUs.
+        * If it's unset, it also means the xrstor() et.al. are privileged
+        * and trigger supervisor trap. So, contrary to what regular x86
+        * does, here we only set CR4_OSXSAVE if the feature is already
+        * enabled according to CPUID.
+        */
+       if (cpu_feature[1] & CPUID2_OSXSAVE)
+               cr4 |= CR4_OSXSAVE;
+       else {
+               x86_xsave_features = 0;
+               x86_fpu_save = FPU_SAVE_FXSAVE;
+       }
+
+       if (cr4) {
+               cr4 |= rcr4();
+               lcr4(cr4);
        }
 
        if (x86_fpu_save >= FPU_SAVE_FXSAVE) {
-               fpuinit_mxcsr_mask();
+               fpuinit_mxcsr_mask(cr4);
+       }
+
+       /*
+        * Changing CR4 register may change cpuid values. For example, setting
+        * CR4_OSXSAVE sets CPUID2_OSXSAVE. The CPUID2_OSXSAVE is in
+        * ci_feat_val[1], so update it.
+        * XXX Other than ci_feat_val[1] might be changed.
+        */
+       if (cpuid_level >= 1) {
+               u_int descs[4];
+
+               x86_cpuid(1, descs);
+               ci->ci_feat_val[1] = descs[2];
+       }
+
+       /* If xsave is enabled, enable all fpu features */
+       if (cr4 & CR4_OSXSAVE) {
+               wrxcr(0, x86_xsave_features & XCR0_FPU);
        }
 
        atomic_or_32(&ci->ci_flags, CPUF_RUNNING);



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