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[src/trunk]: src/sys FDTise RapberryPI support. Thanks for jmcneill for a lot...
details: https://anonhg.NetBSD.org/src/rev/619a6421de2f
branches: trunk
changeset: 828393:619a6421de2f
user: skrll <skrll%NetBSD.org@localhost>
date: Sun Dec 10 21:38:26 2017 +0000
description:
FDTise RapberryPI support. Thanks for jmcneill for a lot of help with this.
The kernel image that the RPI firmware boots is now netbsd.img in the
kernel build directory.
XXX fdtbus_get_reg needs reworking
diffstat:
sys/arch/arm/arm32/arm32_kvminit.c | 19 +-
sys/arch/arm/broadcom/bcm2835_aux.c | 224 +
sys/arch/arm/broadcom/bcm2835_bsc.c | 99 +-
sys/arch/arm/broadcom/bcm2835_cm.c | 49 +-
sys/arch/arm/broadcom/bcm2835_com.c | 102 +-
sys/arch/arm/broadcom/bcm2835_cprman.c | 187 +
sys/arch/arm/broadcom/bcm2835_dmac.c | 63 +-
sys/arch/arm/broadcom/bcm2835_dwctwo.c | 77 +-
sys/arch/arm/broadcom/bcm2835_emmc.c | 92 +-
sys/arch/arm/broadcom/bcm2835_genfb.c | 15 +-
sys/arch/arm/broadcom/bcm2835_gpio.c | 404 ++-
sys/arch/arm/broadcom/bcm2835_gpio_subr.c | 103 -
sys/arch/arm/broadcom/bcm2835_gpio_subr.h | 38 -
sys/arch/arm/broadcom/bcm2835_gpioreg.h | 27 +-
sys/arch/arm/broadcom/bcm2835_intr.c | 295 +-
sys/arch/arm/broadcom/bcm2835_intr.h | 14 +-
sys/arch/arm/broadcom/bcm2835_mbox.c | 47 +-
sys/arch/arm/broadcom/bcm2835_mbox_subr.c | 5 +-
sys/arch/arm/broadcom/bcm2835_obio.c | 349 --
sys/arch/arm/broadcom/bcm2835_plcom.c | 106 -
sys/arch/arm/broadcom/bcm2835_pm.c | 85 +-
sys/arch/arm/broadcom/bcm2835_pmvar.h | 8 +-
sys/arch/arm/broadcom/bcm2835_pmwdog.c | 193 +
sys/arch/arm/broadcom/bcm2835_pmwdogvar.h | 37 +
sys/arch/arm/broadcom/bcm2835_pwm.c | 61 +-
sys/arch/arm/broadcom/bcm2835_rng.c | 33 +-
sys/arch/arm/broadcom/bcm2835_sdhost.c | 80 +-
sys/arch/arm/broadcom/bcm2835_space.c | 324 ++-
sys/arch/arm/broadcom/bcm2835_spi.c | 50 +-
sys/arch/arm/broadcom/bcm2835_tmr.c | 68 +-
sys/arch/arm/broadcom/bcm2835reg.h | 33 +-
sys/arch/arm/broadcom/bcm2835var.h | 10 +-
sys/arch/arm/broadcom/bcm283x_platform.c | 1283 +++++++++
sys/arch/arm/broadcom/bcm_amba.h | 29 -
sys/arch/arm/broadcom/files.bcm2835 | 90 +-
sys/arch/arm/cortex/a9_mpsubr.S | 10 +-
sys/arch/arm/fdt/arm_fdt.c | 7 +-
sys/arch/arm/fdt/cpu_fdt.c | 5 +-
sys/arch/evbarm/compile/rpi-mkknlimg.sh | 58 +
sys/arch/evbarm/conf/RPI | 85 +-
sys/arch/evbarm/conf/RPI2 | 18 +-
sys/arch/evbarm/conf/files.rpi | 10 +-
sys/arch/evbarm/conf/mk.rpi | 10 +-
sys/arch/evbarm/conf/std.rpi | 8 +-
sys/arch/evbarm/fdt/fdt_machdep.c | 56 +-
sys/arch/evbarm/fdt/platform.h | 4 +-
sys/arch/evbarm/include/vmparam.h | 10 +-
sys/arch/evbarm/rpi/genassym.cf | 18 +-
sys/arch/evbarm/rpi/rpi.h | 16 +-
sys/arch/evbarm/rpi/rpi2_start.S | 126 +-
sys/arch/evbarm/rpi/rpi_machdep.c | 1407 ----------
sys/arch/evbarm/rpi/rpi_start.S | 47 +-
sys/arch/evbarm/rpi/vcprop_subr.c | 3 +-
sys/dev/fdt/fdt_subr.c | 15 +-
sys/dev/fdt/fdtvar.h | 4 +-
sys/external/bsd/vchiq/conf/files.vchiq | 4 +-
sys/external/bsd/vchiq/dist/interface/vchiq_arm/vchiq_2835_arm.c | 73 +-
sys/external/bsd/vchiq/dist/interface/vchiq_arm/vchiq_kmod_netbsd.c | 60 +-
sys/external/bsd/vchiq/dist/interface/vchiq_arm/vchiq_netbsd.h | 4 +-
sys/external/gpl2/dts/dist/arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +-
sys/external/gpl2/dts/dist/arch/arm/boot/dts/bcm283x.dtsi | 15 +
61 files changed, 3856 insertions(+), 2918 deletions(-)
diffs (truncated from 9331 to 300 lines):
diff -r d15397f14874 -r 619a6421de2f sys/arch/arm/arm32/arm32_kvminit.c
--- a/sys/arch/arm/arm32/arm32_kvminit.c Sun Dec 10 20:54:05 2017 +0000
+++ b/sys/arch/arm/arm32/arm32_kvminit.c Sun Dec 10 21:38:26 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: arm32_kvminit.c,v 1.40 2017/07/06 15:09:17 skrll Exp $ */
+/* $NetBSD: arm32_kvminit.c,v 1.41 2017/12/10 21:38:26 skrll Exp $ */
/*
* Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
@@ -121,10 +121,11 @@
* SUCH DAMAGE.
*/
+#include "opt_fdt.h"
#include "opt_multiprocessor.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: arm32_kvminit.c,v 1.40 2017/07/06 15:09:17 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm32_kvminit.c,v 1.41 2017/12/10 21:38:26 skrll Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -142,6 +143,10 @@
#include <arm/bootconfig.h>
#include <arm/arm32/machdep.h>
+#if defined(FDT)
+#include <arch/evbarm/fdt/platform.h>
+#endif
+
#ifdef MULTIPROCESSOR
#ifndef __HAVE_CPU_UAREA_ALLOC_IDLELWP
#error __HAVE_CPU_UAREA_ALLOC_IDLELWP required to not waste pages for idlestack
@@ -211,6 +216,11 @@
bmi->bmi_kernelstart = kernelstart;
bmi->bmi_kernelend = KERN_VTOPHYS(bmi, round_page((vaddr_t)_end));
+#if defined(FDT)
+ fdt_add_reserved_memory_range(bmi->bmi_kernelstart,
+ bmi->bmi_kernelend - bmi->bmi_kernelstart);
+#endif
+
#ifdef VERBOSE_INIT_ARM
printf("%s: kernelend=%#lx\n", __func__, bmi->bmi_kernelend);
#endif
@@ -229,6 +239,7 @@
#endif
pv++;
+#if !defined(FDT)
/*
* Add a free block for any memory before the kernel.
*/
@@ -244,6 +255,7 @@
#endif
pv++;
}
+#endif
bmi->bmi_nfreeblocks = pv - bmi->bmi_freeblocks;
@@ -358,6 +370,9 @@
*/
KASSERT((armreg_ttbr_read() & ~(L1_TABLE_SIZE - 1)) != free_pv->pv_pa);
+#if defined(FDT)
+ fdt_add_reserved_memory_range(free_pv->pv_pa, nbytes);
+#endif
pv->pv_pa = free_pv->pv_pa;
pv->pv_va = free_pv->pv_va;
pv->pv_size = nbytes;
diff -r d15397f14874 -r 619a6421de2f sys/arch/arm/broadcom/bcm2835_aux.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/broadcom/bcm2835_aux.c Sun Dec 10 21:38:26 2017 +0000
@@ -0,0 +1,224 @@
+/* $NetBSD: bcm2835_aux.c,v 1.1 2017/12/10 21:38:26 skrll Exp $ */
+
+/*-
+ * Copyright (c) 2017 Jared D. McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_aux.c,v 1.1 2017/12/10 21:38:26 skrll Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/kmem.h>
+#include <sys/bus.h>
+
+#include <dev/clk/clk_backend.h>
+
+#include <dev/fdt/fdtvar.h>
+
+/* Registers */
+#define BCMAUX_AUXIRQ_REG 0x00
+#define BCMAUX_AUXENB_REG 0x04
+
+/* Clock IDs */
+#define BCMAUX_CLOCK_UART 0
+#define BCMAUX_CLOCK_SPI1 1
+#define BCMAUX_CLOCK_SPI2 2
+#define BCMAUX_NCLOCK 3
+
+static int bcmaux_match(device_t, cfdata_t, void *);
+static void bcmaux_attach(device_t, device_t, void *);
+
+static struct clk *bcmaux_decode(device_t, const void *, size_t);
+
+static const struct fdtbus_clock_controller_func bcmaux_fdt_funcs = {
+ .decode = bcmaux_decode
+};
+
+static struct clk *bcmaux_get(void *, const char *);
+static void bcmaux_put(void *, struct clk *);
+static u_int bcmaux_get_rate(void *, struct clk *);
+static int bcmaux_enable(void *, struct clk *);
+static int bcmaux_disable(void *, struct clk *);
+
+static const struct clk_funcs bcmaux_clk_funcs = {
+ .get = bcmaux_get,
+ .put = bcmaux_put,
+ .get_rate = bcmaux_get_rate,
+ .enable = bcmaux_enable,
+ .disable = bcmaux_disable,
+};
+
+struct bcmaux_clk {
+ struct clk base;
+ uint32_t mask;
+};
+
+struct bcmaux_softc {
+ device_t sc_dev;
+ int sc_phandle;
+ bus_space_tag_t sc_bst;
+ bus_space_handle_t sc_bsh;
+
+ struct clk *sc_pclk;
+
+ struct clk_domain sc_clkdom;
+ struct bcmaux_clk sc_clk[BCMAUX_NCLOCK];
+};
+
+#define BCMAUX_READ(sc, reg) \
+ bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
+#define BCMAUX_WRITE(sc, reg, val) \
+ bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
+
+CFATTACH_DECL_NEW(bcmaux_fdt, sizeof(struct bcmaux_softc),
+ bcmaux_match, bcmaux_attach, NULL, NULL);
+
+static int
+bcmaux_match(device_t parent, cfdata_t cf, void *aux)
+{
+ const char * const compatible[] = { "brcm,bcm2835-aux", NULL };
+ const struct fdt_attach_args *faa = aux;
+
+ return of_match_compatible(faa->faa_phandle, compatible);
+}
+
+static void
+bcmaux_attach(device_t parent, device_t self, void *aux)
+{
+ struct bcmaux_softc * const sc = device_private(self);
+ const struct fdt_attach_args *faa = aux;
+ const int phandle = faa->faa_phandle;
+ bus_addr_t addr;
+ bus_size_t size;
+
+ if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
+ aprint_error(": couldn't get registers\n");
+ return;
+ }
+
+ sc->sc_dev = self;
+ sc->sc_phandle = phandle;
+ sc->sc_clkdom.funcs = &bcmaux_clk_funcs;
+ sc->sc_clkdom.priv = sc;
+ sc->sc_pclk = fdtbus_clock_get_index(phandle, 0);
+ if (sc->sc_pclk == NULL) {
+ aprint_error(": couldn't get parent clock\n");
+ return;
+ }
+ sc->sc_bst = faa->faa_bst;
+ if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
+ aprint_error(": couldn't map registers\n");
+ return;
+ }
+
+ sc->sc_clk[BCMAUX_CLOCK_UART].base.domain = &sc->sc_clkdom;
+ sc->sc_clk[BCMAUX_CLOCK_UART].base.name = "aux_uart";
+ sc->sc_clk[BCMAUX_CLOCK_UART].mask = __BIT(0);
+
+ sc->sc_clk[BCMAUX_CLOCK_SPI1].base.domain = &sc->sc_clkdom;
+ sc->sc_clk[BCMAUX_CLOCK_SPI1].base.name = "aux_spi1";
+ sc->sc_clk[BCMAUX_CLOCK_SPI1].mask = __BIT(1);
+
+ sc->sc_clk[BCMAUX_CLOCK_SPI2].base.domain = &sc->sc_clkdom;
+ sc->sc_clk[BCMAUX_CLOCK_SPI2].base.name = "aux_spi2";
+ sc->sc_clk[BCMAUX_CLOCK_SPI2].mask = __BIT(2);
+
+ aprint_naive("\n");
+ aprint_normal("\n");
+
+ fdtbus_register_clock_controller(self, phandle, &bcmaux_fdt_funcs);
+}
+
+static struct clk *
+bcmaux_decode(device_t dev, const void *data, size_t len)
+{
+ struct bcmaux_softc * const sc = device_private(dev);
+ u_int clkid;
+
+ if (len != 4)
+ return NULL;
+
+ clkid = be32dec(data);
+ if (clkid >= BCMAUX_NCLOCK)
+ return NULL;
+
+ return &sc->sc_clk[clkid].base;
+}
+
+static struct clk *
+bcmaux_get(void *priv, const char *name)
+{
+ struct bcmaux_softc * const sc = priv;
+
+ for (size_t i = 0; i < BCMAUX_NCLOCK; i++) {
+ if (strcmp(name, sc->sc_clk[i].base.name) == 0)
+ return &sc->sc_clk[i].base;
+ }
+
+ return NULL;
+}
+
+static void
+bcmaux_put(void *priv, struct clk *clk)
+{
+}
+
+static u_int
+bcmaux_get_rate(void *priv, struct clk *clk)
+{
+ struct bcmaux_softc * const sc = priv;
+
+ return clk_get_rate(sc->sc_pclk);
+}
+
+static int
+bcmaux_enable(void *priv, struct clk *clk)
+{
+ struct bcmaux_softc * const sc = priv;
+ struct bcmaux_clk *auxclk = (struct bcmaux_clk *)clk;
+ uint32_t val;
+
+ val = BCMAUX_READ(sc, BCMAUX_AUXENB_REG);
+ val |= auxclk->mask;
+ BCMAUX_WRITE(sc, BCMAUX_AUXENB_REG, val);
+
+ return 0;
+}
+
+static int
+bcmaux_disable(void *priv, struct clk *clk)
+{
+ struct bcmaux_softc * const sc = priv;
+ struct bcmaux_clk *auxclk = (struct bcmaux_clk *)clk;
+ uint32_t val;
+
+ val = BCMAUX_READ(sc, BCMAUX_AUXENB_REG);
+ val &= ~auxclk->mask;
+ BCMAUX_WRITE(sc, BCMAUX_AUXENB_REG, val);
+
+ return 0;
+}
diff -r d15397f14874 -r 619a6421de2f sys/arch/arm/broadcom/bcm2835_bsc.c
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