Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/external/bsd/llvm/dist/llvm Import LLVM 3.8.1+ r280599.
details: https://anonhg.NetBSD.org/src/rev/aa41f4be0cbf
branches: trunk
changeset: 817722:aa41f4be0cbf
user: joerg <joerg%NetBSD.org@localhost>
date: Sat Sep 03 21:50:19 2016 +0000
description:
Import LLVM 3.8.1+ r280599.
diffstat:
external/bsd/llvm/dist/llvm/CMakeLists.txt | 2 +-
external/bsd/llvm/dist/llvm/docs/ReleaseNotes.rst | 96 +-
external/bsd/llvm/dist/llvm/docs/index.rst | 5 -
external/bsd/llvm/dist/llvm/include/llvm/Support/ThreadPool.h | 1 +
external/bsd/llvm/dist/llvm/lib/Analysis/MemoryDependenceAnalysis.cpp | 32 +-
external/bsd/llvm/dist/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp | 29 +-
external/bsd/llvm/dist/llvm/lib/CodeGen/Analysis.cpp | 5 +
external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 76 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPU.h | 19 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPU.td | 22 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 23 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 6 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 138 +++-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 11 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 15 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 28 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 1 +
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDKernelCodeT.h | 9 +
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 6 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp | 7 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 39 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 75 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 11 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp | 41 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrFormats.td | 1 +
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 317 ++-------
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.h | 20 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.td | 6 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInstructions.td | 11 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIIntrinsics.td | 2 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 126 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 39 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 22 +-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 145 +++-
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 13 +-
external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 6 +-
external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 1 +
external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMISelLowering.cpp | 25 +-
external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMInstrInfo.td | 2 +
external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMInstrThumb.td | 9 +-
external/bsd/llvm/dist/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 16 +-
external/bsd/llvm/dist/llvm/lib/Target/Mips/Mips64InstrInfo.td | 3 +-
external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsCCState.cpp | 4 +-
external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsFastISel.cpp | 7 +-
external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsInstrInfo.td | 2 +-
external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 28 +-
external/bsd/llvm/dist/llvm/lib/Target/X86/X86ExpandPseudo.cpp | 32 +
external/bsd/llvm/dist/llvm/lib/Target/X86/X86FrameLowering.cpp | 10 +-
external/bsd/llvm/dist/llvm/lib/Target/X86/X86FrameLowering.h | 10 +
external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.cpp | 175 +---
external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.h | 2 +
external/bsd/llvm/dist/llvm/lib/Target/X86/X86InstrCompiler.td | 46 +
external/bsd/llvm/dist/llvm/lib/Target/X86/X86InstrInfo.td | 14 +
external/bsd/llvm/dist/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp | 38 +-
external/bsd/llvm/dist/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp | 16 +-
external/bsd/llvm/dist/llvm/test/Analysis/DivergenceAnalysis/AMDGPU/interp-intrinsics.ll | 23 +
external/bsd/llvm/dist/llvm/test/CodeGen/AArch64/merge-store.ll | 64 ++
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll | 18 +-
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/bug-vopc-commute.ll | 50 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll | 2 -
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/ci-use-flat-for-global.ll | 19 +-
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/fmax_legacy.ll | 4 +-
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/fmin_legacy.ll | 33 +-
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/global_atomics.ll | 78 --
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/hsa-default-device.ll | 11 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/hsa.ll | 2 +-
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/indirect-private-64.ll | 20 +-
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll | 12 +-
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/large-alloca-graphics.ll | 8 +-
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/missing-store.ll | 5 +-
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/multilevel-break.ll | 41 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/private-memory.ll | 30 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/promote-alloca-array-allocation.ll | 50 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/promote-alloca-invariant-markers.ll | 25 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/promote-alloca-mem-intrinsics.ll | 65 ++
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/promote-alloca-unhandled-intrinsic.ll | 24 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/promote-alloca-volatile.ll | 26 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/ret_jump.ll | 57 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 13 +-
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/sgpr-copy.ll | 34 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll | 24 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll | 60 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 19 +-
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/split-smrd.ll | 46 +
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll | 26 +-
external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll | 4 +-
external/bsd/llvm/dist/llvm/test/CodeGen/ARM/Windows/builtin_longjmp.ll | 17 +
external/bsd/llvm/dist/llvm/test/CodeGen/ARM/Windows/dbzchk.ll | 80 ++
external/bsd/llvm/dist/llvm/test/CodeGen/ARM/Windows/division.ll | 19 +-
external/bsd/llvm/dist/llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll | 8 +-
external/bsd/llvm/dist/llvm/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll | 2 +
external/bsd/llvm/dist/llvm/test/CodeGen/Mips/Fast-ISel/fastalloca.ll | 2 +-
external/bsd/llvm/dist/llvm/test/CodeGen/Mips/Fast-ISel/memtest1.ll | 4 +-
external/bsd/llvm/dist/llvm/test/CodeGen/Mips/cconv/return-struct.ll | 3 -
external/bsd/llvm/dist/llvm/test/CodeGen/Mips/cconv/roundl-call.ll | 44 +
external/bsd/llvm/dist/llvm/test/CodeGen/Mips/fcopysign-f32-f64.ll | 34 +-
external/bsd/llvm/dist/llvm/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll | 24 +
external/bsd/llvm/dist/llvm/test/CodeGen/PowerPC/pr27350.ll | 26 +
external/bsd/llvm/dist/llvm/test/CodeGen/X86/atomic128.ll | 11 +-
external/bsd/llvm/dist/llvm/test/CodeGen/X86/base-pointer-and-cmpxchg.ll | 51 +
external/bsd/llvm/dist/llvm/test/CodeGen/X86/i686-win-shrink-wrapping.ll | 44 +
external/bsd/llvm/dist/llvm/test/CodeGen/X86/pop-stack-cleanup.ll | 11 +
external/bsd/llvm/dist/llvm/test/CodeGen/X86/vector-blend.ll | 19 +-
external/bsd/llvm/dist/llvm/test/ExecutionEngine/RuntimeDyld/Mips/ELF_N64R6_relocations.s | 4 +-
external/bsd/llvm/dist/llvm/test/ExecutionEngine/RuntimeDyld/Mips/ELF_O32R6_relocations.s | 4 +-
external/bsd/llvm/dist/llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64.ll | 55 +
external/bsd/llvm/dist/llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64el.ll | 54 +
external/bsd/llvm/dist/llvm/test/LTO/X86/pr25919.ll | 11 +
external/bsd/llvm/dist/llvm/test/MC/AMDGPU/sopp.s | 12 +-
external/bsd/llvm/dist/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt | 65 +-
external/bsd/llvm/dist/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt | 79 +-
external/bsd/llvm/dist/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt | 67 +-
external/bsd/llvm/dist/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt | 79 +-
external/bsd/llvm/dist/llvm/test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt | 20 +-
external/bsd/llvm/dist/llvm/test/MC/Mips/mips32r6/valid.s | 2 +
external/bsd/llvm/dist/llvm/test/MC/Mips/mips64r6/valid.s | 2 +
external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/unpack-fca.ll | 27 +
external/bsd/llvm/dist/llvm/utils/release/merge.sh | 2 +-
118 files changed, 2563 insertions(+), 1057 deletions(-)
diffs (truncated from 6370 to 300 lines):
diff -r e52f99dcc36a -r aa41f4be0cbf external/bsd/llvm/dist/llvm/CMakeLists.txt
--- a/external/bsd/llvm/dist/llvm/CMakeLists.txt Sat Sep 03 16:10:34 2016 +0000
+++ b/external/bsd/llvm/dist/llvm/CMakeLists.txt Sat Sep 03 21:50:19 2016 +0000
@@ -33,7 +33,7 @@
set(LLVM_VERSION_MINOR 8)
endif()
if(NOT DEFINED LLVM_VERSION_PATCH)
- set(LLVM_VERSION_PATCH 0)
+ set(LLVM_VERSION_PATCH 1)
endif()
if(NOT DEFINED LLVM_VERSION_SUFFIX)
set(LLVM_VERSION_SUFFIX "")
diff -r e52f99dcc36a -r aa41f4be0cbf external/bsd/llvm/dist/llvm/docs/ReleaseNotes.rst
--- a/external/bsd/llvm/dist/llvm/docs/ReleaseNotes.rst Sat Sep 03 16:10:34 2016 +0000
+++ b/external/bsd/llvm/dist/llvm/docs/ReleaseNotes.rst Sat Sep 03 21:50:19 2016 +0000
@@ -31,25 +31,30 @@
in the 3.9 release. Please migrate to using CMake. For more information see:
`Building LLVM with CMake <CMake.html>`_
-* The C API function LLVMLinkModules is deprecated. It will be removed in the
- 3.9 release. Please migrate to LLVMLinkModules2. Unlike the old function the
+* We have documented our C API stability guarantees for both development and
+ release branches, as well as documented how to extend the C API. Please see
+ the `developer documentation <DeveloperPolicy.html#c-api-changes>`_ for more
+ information.
+
+* The C API function ``LLVMLinkModules`` is deprecated. It will be removed in the
+ 3.9 release. Please migrate to ``LLVMLinkModules2``. Unlike the old function the
new one
* Doesn't take an unused parameter.
* Destroys the source instead of only damaging it.
* Does not record a message. Use the diagnostic handler instead.
-* The C API functions LLVMParseBitcode, LLVMParseBitcodeInContext,
- LLVMGetBitcodeModuleInContext and LLVMGetBitcodeModule have been deprecated.
+* The C API functions ``LLVMParseBitcode``, ``LLVMParseBitcodeInContext``,
+ ``LLVMGetBitcodeModuleInContext`` and ``LLVMGetBitcodeModule`` have been deprecated.
They will be removed in 3.9. Please migrate to the versions with a 2 suffix.
Unlike the old ones the new ones do not record a diagnostic message. Use
the diagnostic handler instead.
-* The deprecated C APIs LLVMGetBitcodeModuleProviderInContext and
- LLVMGetBitcodeModuleProvider have been removed.
+* The deprecated C APIs ``LLVMGetBitcodeModuleProviderInContext`` and
+ ``LLVMGetBitcodeModuleProvider`` have been removed.
-* The deprecated C APIs LLVMCreateExecutionEngine, LLVMCreateInterpreter,
- LLVMCreateJITCompiler, LLVMAddModuleProvider and LLVMRemoveModuleProvider
+* The deprecated C APIs ``LLVMCreateExecutionEngine``, ``LLVMCreateInterpreter``,
+ ``LLVMCreateJITCompiler``, ``LLVMAddModuleProvider`` and ``LLVMRemoveModuleProvider``
have been removed.
* With this release, the C API headers have been reorganized to improve build
@@ -58,21 +63,21 @@
Core.h so nothing should change for projects directly including the headers,
but transitive dependencies may be affected.
-* llvm-ar now suports thin archives.
+* llvm-ar now supports thin archives.
-* llvm doesn't produce .data.rel.ro.local or .data.rel sections anymore.
+* llvm doesn't produce ``.data.rel.ro.local`` or ``.data.rel`` sections anymore.
-* aliases to available_externally globals are now rejected by the verifier.
+* Aliases to ``available_externally`` globals are now rejected by the verifier.
-* the IR Linker has been split into IRMover that moves bits from one module to
+* The IR Linker has been split into ``IRMover`` that moves bits from one module to
another and Linker proper that decides what to link.
* Support for dematerializing has been dropped.
-* RegisterScheduler::setDefault was removed. Targets that used to call into the
- command line parser to set the DAGScheduler, and that don't have enough
- control with setSchedulingPreference, should look into overriding the
- SubTargetHook "getDAGScheduler()".
+* ``RegisterScheduler::setDefault`` was removed. Targets that used to call into the
+ command line parser to set the ``DAGScheduler``, and that don't have enough
+ control with ``setSchedulingPreference``, should look into overriding the
+ ``SubTargetHook`` "``getDAGScheduler()``".
* ``ilist_iterator<T>`` no longer has implicit conversions to and from ``T*``,
since ``ilist_iterator<T>`` may be pointing at the sentinel (which is usually
@@ -84,7 +89,7 @@
* ``ilist_node<T>::getNextNode()`` and ``ilist_node<T>::getPrevNode()`` now
fail at compile time when the node cannot access its parent list.
Previously, when the sentinel was was an ``ilist_half_node<T>``, this API
- could return the sentinal instead of ``nullptr``. Frustrated callers should
+ could return the sentinel instead of ``nullptr``. Frustrated callers should
be updated to use ``iplist<T>::getNextNode(T*)`` instead. Alternatively, if
the node ``N`` is guaranteed not to be the last in the list, it is safe to
call ``&*++N->getIterator()`` directly.
@@ -106,32 +111,13 @@
variables are converted to calls to ``__emutls_get_address`` in the runtime
library.
-* MSVC compatible exception handling has been completely overhauled. New
+* MSVC-compatible exception handling has been completely overhauled. New
instructions have been introduced to facilitate this:
`New exception handling instructions <ExceptionHandling.html#new-exception-handling-instructions>`_.
While we have done our best to test this feature thoroughly, it would
not be completely surprising if there were a few lingering issues that
early adopters might bump into.
-.. NOTE
- For small 1-3 sentence descriptions, just add an entry at the end of
- this list. If your description won't fit comfortably in one bullet
- point (e.g. maybe you would like to give an example of the
- functionality, or simply have a lot to talk about), see the `NOTE` below
- for adding a new subsection.
-
-* ... next change ...
-
-.. NOTE
- If you would like to document a larger change, then you can add a
- subsection about it right here. You can copy the following boilerplate
- and un-indent it (the indentation causes it to be inside this comment).
-
- Special New Feature
- -------------------
-
- Makes programs 10x faster by doing Special New Thing.
-
Changes to the ARM Backends
---------------------------
@@ -160,7 +146,7 @@
* Gained some additional code size improvements, though there's still a long road
ahead, especially for older cores.
* Added some EABI floating point comparison functions to Compiler-RT
-* Added support for Windows+GNU triple, +features in -mcpu/-march options.
+* Added support for Windows+GNU triple, ``+features`` in ``-mcpu``/``-march`` options.
Changes to the MIPS Target
@@ -177,10 +163,10 @@
* Added support for the ``ERETNC`` instruction found in MIPS32R5 and later.
* Added support for OpenCL. See http://portablecl.org/.
- * Address spaces 1 to 255 are now reserved for software use and conversions
- between them are no-op casts.
+* Address spaces 1 to 255 are now reserved for software use and conversions
+ between them are no-op casts.
-* Removed the ``mips16`` value for the -mcpu option since it is an :abbr:`ASE
+* Removed the ``mips16`` value for the ``-mcpu`` option since it is an :abbr:`ASE
(Application Specific Extension)` and not a processor. If you were using this,
please specify another CPU and use ``-mips16`` to enable MIPS16.
* Removed ``copy_u.w`` from 32-bit MSA and ``copy_u.d`` from 64-bit MSA since
@@ -212,8 +198,6 @@
* Added support for atomic load and atomic store.
* Corrected debug info when dynamically re-aligning the stack.
-Integrated Assembler
-^^^^^^^^^^^^^^^^^^^^
We have made a large number of improvements to the integrated assembler for
MIPS. In this release, the integrated assembler isn't quite production-ready
since there are a few known issues related to bare-metal support, checking
@@ -227,14 +211,31 @@
Changes to the PowerPC Target
-----------------------------
- During this release ...
+There are numerous improvements to the PowerPC target in this release:
+
+* Shrink wrapping optimization has been enabled for PowerPC Little Endian
+
+* Direct move instructions are used when converting scalars to vectors
+
+* Thread Sanitizer (TSAN) is now supported for PowerPC
+
+* New MI peephole pass to clean up redundant XXPERMDI instructions
+
+* Add branch hints to highly biased branch instructions (code reaching
+ unreachable terminators and exceptional control flow constructs)
+
+* Promote boolean return values to integer to prevent excessive usage of
+ condition registers
+
+* Additional vector APIs for vector comparisons and vector merges have been
+ added to altivec.h
+
+* Many bugs have been identified and fixed
Changes to the X86 Target
-----------------------------
- During this release ...
-
* TLS is enabled for Cygwin as emutls.
* Smaller code for materializing 32-bit 1 and -1 constants at ``-Os``.
@@ -262,8 +263,6 @@
Changes to the OCaml bindings
-----------------------------
- During this release ...
-
* The ocaml function link_modules has been replaced with link_modules' which
uses LLVMLinkModules2.
@@ -302,4 +301,3 @@
If you have any questions or comments about LLVM, please feel free to contact
us via the `mailing lists <http://llvm.org/docs/#maillist>`_.
-
diff -r e52f99dcc36a -r aa41f4be0cbf external/bsd/llvm/dist/llvm/docs/index.rst
--- a/external/bsd/llvm/dist/llvm/docs/index.rst Sat Sep 03 16:10:34 2016 +0000
+++ b/external/bsd/llvm/dist/llvm/docs/index.rst Sat Sep 03 21:50:19 2016 +0000
@@ -1,11 +1,6 @@
Overview
========
-.. warning::
-
- If you are using a released version of LLVM, see `the download page
- <http://llvm.org/releases/>`_ to find your documentation.
-
The LLVM compiler infrastructure supports a wide range of projects, from
industrial strength compilers to specialized JIT applications to small
research projects.
diff -r e52f99dcc36a -r aa41f4be0cbf external/bsd/llvm/dist/llvm/include/llvm/Support/ThreadPool.h
--- a/external/bsd/llvm/dist/llvm/include/llvm/Support/ThreadPool.h Sat Sep 03 16:10:34 2016 +0000
+++ b/external/bsd/llvm/dist/llvm/include/llvm/Support/ThreadPool.h Sat Sep 03 21:50:19 2016 +0000
@@ -33,6 +33,7 @@
#pragma warning(pop)
#endif
+#include <atomic>
#include <condition_variable>
#include <functional>
#include <memory>
diff -r e52f99dcc36a -r aa41f4be0cbf external/bsd/llvm/dist/llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
--- a/external/bsd/llvm/dist/llvm/lib/Analysis/MemoryDependenceAnalysis.cpp Sat Sep 03 16:10:34 2016 +0000
+++ b/external/bsd/llvm/dist/llvm/lib/Analysis/MemoryDependenceAnalysis.cpp Sat Sep 03 21:50:19 2016 +0000
@@ -57,6 +57,11 @@
cl::desc("The number of instructions to scan in a block in memory "
"dependency analysis (default = 100)"));
+static cl::opt<unsigned> BlockNumberLimit(
+ "memdep-block-number-limit", cl::Hidden, cl::init(1000),
+ cl::desc("The number of blocks to scan during memory "
+ "dependency analysis (default = 1000)"));
+
// Limit on the number of memdep results to process.
static const unsigned int NumResultsLimit = 100;
@@ -1246,6 +1251,8 @@
// won't get any reuse from currently inserted values, because we don't
// revisit blocks after we insert info for them.
unsigned NumSortedEntries = Cache->size();
+ unsigned WorklistEntries = BlockNumberLimit;
+ bool GotWorklistLimit = false;
DEBUG(AssertSorted(*Cache));
while (!Worklist.empty()) {
@@ -1324,6 +1331,15 @@
goto PredTranslationFailure;
}
}
+ if (NewBlocks.size() > WorklistEntries) {
+ // Make sure to clean up the Visited map before continuing on to
+ // PredTranslationFailure.
+ for (unsigned i = 0; i < NewBlocks.size(); i++)
+ Visited.erase(NewBlocks[i]);
+ GotWorklistLimit = true;
+ goto PredTranslationFailure;
+ }
+ WorklistEntries -= NewBlocks.size();
Worklist.append(NewBlocks.begin(), NewBlocks.end());
continue;
}
@@ -1469,18 +1485,22 @@
if (SkipFirstBlock)
return true;
- for (NonLocalDepInfo::reverse_iterator I = Cache->rbegin(); ; ++I) {
- assert(I != Cache->rend() && "Didn't find current block??");
- if (I->getBB() != BB)
+ bool foundBlock = false;
+ for (NonLocalDepEntry &I: llvm::reverse(*Cache)) {
+ if (I.getBB() != BB)
continue;
- assert((I->getResult().isNonLocal() || !DT->isReachableFromEntry(BB)) &&
+ assert((GotWorklistLimit || I.getResult().isNonLocal() || \
+ !DT->isReachableFromEntry(BB)) &&
"Should only be here with transparent block");
- I->setResult(MemDepResult::getUnknown());
- Result.push_back(NonLocalDepResult(I->getBB(), I->getResult(),
+ foundBlock = true;
+ I.setResult(MemDepResult::getUnknown());
+ Result.push_back(NonLocalDepResult(I.getBB(), I.getResult(),
Pointer.getAddr()));
break;
}
+ (void)foundBlock;
+ assert((foundBlock || GotWorklistLimit) && "Current block not in cache?");
Home |
Main Index |
Thread Index |
Old Index