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[src/trunk]: src/sys/arch XU4 GPIO FDT broken snapshot
details: https://anonhg.NetBSD.org/src/rev/e2ba48fe8689
branches: trunk
changeset: 812530:e2ba48fe8689
user: marty <marty%NetBSD.org@localhost>
date: Sat Dec 19 21:42:31 2015 +0000
description:
XU4 GPIO FDT broken snapshot
This is broken. exynos_gpio_bank_config and the call to it are wrong, and
the acquire function doesn't work.
But I'm in over my head and I need to discuss this:
There is a problem with the dtd: it doesn't have addresses for the individual
gpios. Do I add the addresses to it, or go back to the old version where I
have them hard coded in the driver.
There is a problem with creating the gpio device entries: I suspect I really
need to treat the pinctrl devices as busses and create the gpios as attached
to those busses, but I'm not familiar with how to do that in NetBSD. At the
minimum, a pointer to a similar situation would give me code to follow.
This is different than the usual bus attachment in that the gpios aren't
devices in the dtd (they don't have "compatible" properties) so they don't
get an attach routine called. An alternative to generating the bus
attachments might be to add "compatible" properties to the GPIO entries
in the dtd. so that they do get attached in the normal way.
If I'm going to modify the DTD, then it should be checked in, so a decision
on where to check them in would be nice, even if it does mean spreading them
all over because of license issues. (This DTD is GPL v2)
diffstat:
sys/arch/arm/samsung/exynos_gpio.c | 412 ++++++++++-----------------------
sys/arch/arm/samsung/exynos_pinctrl.c | 110 +++++++++
sys/arch/arm/samsung/exynos_var.h | 5 +-
sys/arch/arm/samsung/files.exynos | 14 +-
sys/arch/evbarm/conf/EXYNOS | 13 +-
5 files changed, 266 insertions(+), 288 deletions(-)
diffs (truncated from 735 to 300 lines):
diff -r 404b6dc4c027 -r e2ba48fe8689 sys/arch/arm/samsung/exynos_gpio.c
--- a/sys/arch/arm/samsung/exynos_gpio.c Sat Dec 19 20:01:35 2015 +0000
+++ b/sys/arch/arm/samsung/exynos_gpio.c Sat Dec 19 21:42:31 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: exynos_gpio.c,v 1.13 2015/12/11 04:03:44 marty Exp $ */
+/* $NetBSD: exynos_gpio.c,v 1.14 2015/12/19 21:42:31 marty Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
#include "gpio.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: exynos_gpio.c,v 1.13 2015/12/11 04:03:44 marty Exp $");
+__KERNEL_RCSID(1, "$NetBSD: exynos_gpio.c,v 1.14 2015/12/19 21:42:31 marty Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -49,6 +49,9 @@
#include <arm/samsung/exynos_reg.h>
#include <arm/samsung/exynos_io.h>
#include <arm/samsung/exynos_intr.h>
+#include <arm/samsung/exynos_pinctrl.h>
+
+#include <dev/fdt/fdtvar.h>
struct exynos_gpio_pin_cfg {
uint32_t cfg;
@@ -62,9 +65,9 @@
struct exynos_gpio_bank {
const char bank_name[6];
- struct exynos_gpio_softc *bank_sc;
device_t bank_dev;
struct gpio_chipset_tag bank_gc;
+ struct exynos_gpio_softc *bank_softc;
gpio_pin_t bank_pins[8];
const bus_addr_t bank_core_offset;
@@ -74,172 +77,42 @@
uint8_t bank_pin_inuse_mask;
bus_space_handle_t bank_bsh;
struct exynos_gpio_pin_cfg bank_cfg;
+ struct exynos_gpio_bank * bank_next;
};
struct exynos_gpio_softc {
device_t sc_dev;
bus_space_tag_t sc_bst;
bus_space_handle_t sc_bsh;
-
- struct exynos_gpio_bank *sc_banks;
};
struct exynos_gpio_pin {
struct exynos_gpio_softc *pin_sc;
- const struct exynos_gpio_bank *pin_bank;
int pin_no;
u_int pin_flags;
-};
-
-#define GPIO_REG(v,s,o) (EXYNOS##v##_GPIO_##s##_OFFSET + (o))
-#define GPIO_GRP(v, s, o, n, b) \
- { \
- .bank_name = #n, \
- .bank_core_offset = GPIO_REG(v,s,o), \
- .bank_bits = b, \
- }
-
-static struct exynos_gpio_bank exynos5_banks[] = {
- GPIO_GRP(5, MUXA, 0x0000, gpy7, 8),
- GPIO_GRP(5, MUXA, 0x0C00, gpx0, 8),
- GPIO_GRP(5, MUXA, 0x0C20, gpx1, 8),
- GPIO_GRP(5, MUXA, 0x0C40, gpx2, 8),
- GPIO_GRP(5, MUXA, 0x0C60, gpx3, 8),
-
- GPIO_GRP(5, MUXB, 0x0000, gpc0, 8),
- GPIO_GRP(5, MUXB, 0x0020, gpc1, 8),
- GPIO_GRP(5, MUXB, 0x0040, gpc2, 7),
- GPIO_GRP(5, MUXB, 0x0060, gpc3, 4),
- GPIO_GRP(5, MUXB, 0x0080, gpc4, 2),
- GPIO_GRP(5, MUXB, 0x00A0, gpd1, 8),
- GPIO_GRP(5, MUXB, 0x00C0, gpy0, 6),
- GPIO_GRP(5, MUXB, 0x00E0, gpy1, 4),
- GPIO_GRP(5, MUXB, 0x0100, gpy2, 6),
- GPIO_GRP(5, MUXB, 0x0120, gpy3, 8),
- GPIO_GRP(5, MUXB, 0x0140, gpy4, 8),
- GPIO_GRP(5, MUXB, 0x0160, gpy5, 8),
- GPIO_GRP(5, MUXB, 0x0180, gpy6, 8),
-
- GPIO_GRP(5, MUXC, 0x0000, gpe0, 8),
- GPIO_GRP(5, MUXC, 0x0020, gpe1, 2),
- GPIO_GRP(5, MUXC, 0x0040, gpf0, 6),
- GPIO_GRP(5, MUXC, 0x0060, gpf1, 8),
- GPIO_GRP(5, MUXC, 0x0080, gpg0, 8),
- GPIO_GRP(5, MUXC, 0x00A0, gpg1, 8),
- GPIO_GRP(5, MUXC, 0x00C0, gpg2, 2),
- GPIO_GRP(5, MUXC, 0x00E0, gpj4, 4),
-
- GPIO_GRP(5, MUXD, 0x0000, gpa0, 8),
- GPIO_GRP(5, MUXD, 0x0020, gpa1, 6),
- GPIO_GRP(5, MUXD, 0x0040, gpa2, 8),
- GPIO_GRP(5, MUXD, 0x0060, gpb0, 5),
- GPIO_GRP(5, MUXD, 0x0080, gpb1, 5),
- GPIO_GRP(5, MUXD, 0x00A0, gpb2, 4),
- GPIO_GRP(5, MUXD, 0x00C0, gpb3, 8),
- GPIO_GRP(5, MUXD, 0x00E0, gpb4, 2),
- GPIO_GRP(5, MUXD, 0x0100, gph0, 4),
-
-// GPIO_GRP(5, MUXE, 0x0000, gpz0, 7),
+ int pin_actlo;
+ const struct exynos_gpio_bank *pin_bank;
};
-static int exynos_gpio_match(device_t, cfdata_t, void *);
-static void exynos_gpio_attach(device_t, device_t, void *);
-
-static int exynos_gpio_pin_read(void *, int);
-static void exynos_gpio_pin_write(void *, int, int);
-static void exynos_gpio_pin_ctl(void *, int, int);
-static int exynos_gpio_cfprint(void *, const char *);
-struct exynos_gpio_pin *exynos_gpio_acquire(const char *pinname, u_int flags);
-
-/* force these structures in DATA segment */
-static struct exynos_gpio_bank *exynos_gpio_banks = NULL;
-static int exynos_n_gpio_banks = 0;
-
-static struct exynos_gpio_softc exynos_gpio_sc = {};
-
-CFATTACH_DECL_NEW(exynos_gpio, sizeof(struct exynos_gpio_softc),
- exynos_gpio_match, exynos_gpio_attach, NULL, NULL);
+struct exynos_gpio_bank *exynos_gpio_banks;
-static int
-exynos_gpio_match(device_t parent, cfdata_t cf, void *aux)
-{
-#ifdef DIAGNOSTIC
- struct exyo_attach_args * const exyoaa = aux;
- struct exyo_locators *loc = &exyoaa->exyo_loc;
-#endif
-
- /* no locators expected */
- KASSERT(loc->loc_offset == 0);
- KASSERT(loc->loc_size == 0);
- KASSERT(loc->loc_port == EXYOCF_PORT_DEFAULT);
-
- /* there can only be one */
- if (exynos_gpio_sc.sc_dev != NULL)
- return 0;
- return 1;
-}
-
-
-#if NGPIO > 0
-static void
-exynos_gpio_attach_banks(device_t self)
-{
- struct exynos_gpio_softc * const sc = &exynos_gpio_sc;
- struct exynos_gpio_bank *bank;
- struct gpiobus_attach_args gba;
- size_t pin_count = 0;
- int i, bit, mask, pincaps, data;
+static void exynos_gpio_pin_ctl(void *cookie, int pin, int flags);
+static void *exynos_gpio_fdt_acquire(device_t, const void *,
+ size_t, int);
+static void exynos_gpio_fdt_release(device_t, void *);
- if (exynos_n_gpio_banks == 0)
- return;
-
- /* find out how many pins we can offer */
- pin_count = 0;
- for (i = 0; i < exynos_n_gpio_banks; i++) {
- pin_count += exynos_gpio_banks[i].bank_bits;
- }
-
- /* if no pins available, don't proceed */
- if (pin_count == 0)
- return;
-
- /* allocate pin data */
- sc->sc_banks = exynos_gpio_banks;
- KASSERT(sc->sc_banks);
-
- pincaps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
- GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN;
+static int exynos_gpio_fdt_read(device_t, void *);
+static void exynos_gpio_fdt_write(device_t, void *, int);
+//static int exynos_gpio_cfprint(void *, const char *);
- for (i = 0; i < exynos_n_gpio_banks; i++) {
- bank = &sc->sc_banks[i];
- bank->bank_sc = sc;
- bank->bank_gc.gp_cookie = bank;
- bank->bank_gc.gp_pin_read = exynos_gpio_pin_read;
- bank->bank_gc.gp_pin_write = exynos_gpio_pin_write;
- bank->bank_gc.gp_pin_ctl = exynos_gpio_pin_ctl;
- mask = bank->bank_pin_mask & ~bank->bank_pin_inuse_mask;
- if (mask == 0)
- continue;
- data = bus_space_read_1(sc->sc_bst, bank->bank_bsh,
- EXYNOS_GPIO_DAT);
- for (bit = 0; mask != 0; mask >>= 1, data >>= 1, bit++) {
- if (mask & 1) {
- bank->bank_pins[bit].pin_num = bit + (i << 3);
- bank->bank_pins[bit].pin_caps = pincaps;
- bank->bank_pins[bit].pin_flags = pincaps;
- bank->bank_pins[bit].pin_state = (data & 1) != 0;
- }
- }
- memset(&gba, 0, sizeof(gba));
- gba.gba_gc = &bank->bank_gc;
- gba.gba_pins = bank->bank_pins;
- gba.gba_npins = bit; /* MJF? */
- bank->bank_dev = config_found_ia(self, "gpiobus", &gba,
- exynos_gpio_cfprint);
- }
-}
-#endif
+struct fdtbus_gpio_controller_func exynos_gpio_funcs = {
+ .acquire = exynos_gpio_fdt_acquire,
+ .release = exynos_gpio_fdt_release,
+ .read = exynos_gpio_fdt_read,
+ .write = exynos_gpio_fdt_write
+};
+#if 0
static int
exynos_gpio_cfprint(void *priv, const char *pnp)
{
@@ -254,79 +127,7 @@
return UNCONF;
}
-
-static void
-exynos_gpio_attach(device_t parent, device_t self, void *aux)
-{
- struct exynos_gpio_softc * const sc = &exynos_gpio_sc;
- struct exyo_attach_args * const exyoaa = aux;
-
- sc->sc_dev = self;
- sc->sc_bst = exyoaa->exyo_core_bst;
- sc->sc_bsh = exyoaa->exyo_core_bsh;
-
- exynos_gpio_bootstrap();
- if (exynos_n_gpio_banks == 0) {
- printf(": disabled, no pins defined\n");
- return;
- }
-
- KASSERT(exynos_gpio_banks);
- KASSERT(exynos_n_gpio_banks);
-
- aprint_naive("\n");
- aprint_normal("\n");
-
-#if NGPIO > 0
- exynos_gpio_attach_banks(self);
#endif
-}
-
-static void
-exynos_gpio_set_pin_func(struct exynos_gpio_pin_cfg *cfg,
- int pin, int func)
-{
- const u_int shift = (pin & 7) << 2;
-
- cfg->cfg &= ~(0x0f << shift);
- cfg->cfg |= func << shift;
-}
-
-
-static void
-exynos_gpio_set_pin_pull(struct exynos_gpio_pin_cfg *cfg, int pin, int pull)
-{
- const u_int shift = (pin & 7) << 1;
-
- cfg->pud &= ~(0x3 << shift);
- cfg->pud |= pull << shift;
-}
-
-static int
-exynos_gpio_pin_read(void *cookie, int pin)
-{
- struct exynos_gpio_bank * const bank = cookie;
-
- KASSERT(pin < bank->bank_bits);
- return (bus_space_read_1(exynos_gpio_sc.sc_bst, bank->bank_bsh,
- EXYNOS_GPIO_DAT) >> pin) & 1;
-}
-
-static void
-exynos_gpio_pin_write(void *cookie, int pin, int value)
-{
- struct exynos_gpio_bank * const bank = cookie;
- int val;
-
- KASSERT(pin < bank->bank_bits);
- val = bus_space_read_1(exynos_gpio_sc.sc_bst, bank->bank_bsh,
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