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[src/riastradh-drm2]: src/sys/external/bsd/drm2/dist/drm/i915 Replace dma_set...
details: https://anonhg.NetBSD.org/src/rev/9b9cd202aa91
branches: riastradh-drm2
changeset: 788314:9b9cd202aa91
user: riastradh <riastradh%NetBSD.org@localhost>
date: Wed Jul 24 03:12:48 2013 +0000
description:
Replace dma_set_coherent_mask by drm_limit_dma_space in i915_dma.c.
diffstat:
sys/external/bsd/drm2/dist/drm/i915/i915_dma.c | 16 ++++++++++++++++
1 files changed, 16 insertions(+), 0 deletions(-)
diffs (35 lines):
diff -r e154206ce9db -r 9b9cd202aa91 sys/external/bsd/drm2/dist/drm/i915/i915_dma.c
--- a/sys/external/bsd/drm2/dist/drm/i915/i915_dma.c Wed Jul 24 03:12:33 2013 +0000
+++ b/sys/external/bsd/drm2/dist/drm/i915/i915_dma.c Wed Jul 24 03:12:48 2013 +0000
@@ -1570,7 +1570,15 @@
/* overlay on gen2 is broken and can't address above 1G */
if (IS_GEN2(dev))
+#ifdef __NetBSD__
+ {
+ ret = drm_limit_dma_space(dev, 0, 0x3fffffffUL);
+ if (ret)
+ goto put_gmch;
+ }
+#else
dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(30));
+#endif
/* 965GM sometimes incorrectly writes to hardware status page (HWS)
* using 32bit addressing, overwriting memory if HWS is located
@@ -1581,7 +1589,15 @@
* which also needs to be handled carefully.
*/
if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))
+#ifdef __NetBSD__
+ {
+ ret = drm_limit_dma_space(dev, 0, 0xffffffffUL);
+ if (ret)
+ goto put_gmch;
+ }
+#else
dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(32));
+#endif
mmio_bar = IS_GEN2(dev) ? 1 : 0;
/* Before gen4, the registers and the GTT are behind different BARs.
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