[src/trunk]: src/sys/arch/mips/mips Deal with 64-bit fallout from previous.

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/3c7a9fd0ab95
branches:  trunk
changeset: 806258:3c7a9fd0ab95
user:      skrll <skrll%NetBSD.org@localhost>
date:      Fri Feb 13 17:19:23 2015 +0000

description:
Deal with 64-bit fallout from previous.

diffstat:

 sys/arch/mips/mips/bus_dma.c |  12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diffs (34 lines):

diff -r 8c6afb999efb -r 3c7a9fd0ab95 sys/arch/mips/mips/bus_dma.c
--- a/sys/arch/mips/mips/bus_dma.c      Fri Feb 13 17:14:06 2015 +0000
+++ b/sys/arch/mips/mips/bus_dma.c      Fri Feb 13 17:19:23 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: bus_dma.c,v 1.31 2014/05/27 15:56:18 skrll Exp $       */
+/*     $NetBSD: bus_dma.c,v 1.32 2015/02/13 17:19:23 skrll Exp $       */
 
 /*-
  * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
 
 #include <sys/cdefs.h>                 /* RCS ID & Copyright macro defns */
 
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.31 2014/05/27 15:56:18 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.32 2015/02/13 17:19:23 skrll Exp $");
 
 #define _MIPS_BUS_DMA_PRIVATE
 
@@ -861,11 +861,11 @@
                        vaddr_t start = vaddr;
                        vaddr_t end = vaddr + minlen;
                        vaddr_t preboundary, firstboundary, lastboundary;
+                       vaddr_t mask = mci->mci_dcache_align_mask;
 
-                       preboundary = start & ~mci->mci_dcache_align_mask;
-                       firstboundary = (start + mci->mci_dcache_align_mask)
-                           & ~mci->mci_dcache_align_mask;
-                       lastboundary = end & ~mci->mci_dcache_align_mask;
+                       preboundary = start & ~mask;
+                       firstboundary = (start + mask) & ~mask;
+                       lastboundary = end & ~mask;
                        if (preboundary < start && preboundary < lastboundary)
                                mips_dcache_wbinv_range(preboundary,
                                    mci->mci_dcache_align);