[src/trunk]: src/sys/arch/arm/allwinner add some A31 specific PLL7 and PIO regs

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/7af5cd27705e
branches:  trunk
changeset: 803188:7af5cd27705e
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Wed Oct 15 23:28:37 2014 +0000

description:
add some A31 specific PLL7 and PIO regs

diffstat:

 sys/arch/arm/allwinner/awin_reg.h |  26 ++++++++++++++++++++++++++
 1 files changed, 26 insertions(+), 0 deletions(-)

diffs (46 lines):

diff -r 42cadfe3d174 -r 7af5cd27705e sys/arch/arm/allwinner/awin_reg.h
--- a/sys/arch/arm/allwinner/awin_reg.h Wed Oct 15 23:04:08 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_reg.h Wed Oct 15 23:28:37 2014 +0000
@@ -1734,6 +1734,14 @@
 #define AWIN_A31_PLL2_CFG_FACTOR_N     __BITS(14,8)
 #define AWIN_A31_PLL2_CFG_PREVDIV_M    __BITS(4,0)
 
+#define AWIN_A31_PLL7_CFG_MODE         __BIT(30)
+#define AWIN_A31_PLL7_CFG_LOCK         __BIT(28)
+#define AWIN_A31_PLL7_CFG_FRAC_CLK_OUT __BIT(25)
+#define AWIN_A31_PLL7_CFG_MODE_SEL     __BIT(24)
+#define AWIN_A31_PLL7_CFG_SDM_EN       __BIT(20)
+#define AWIN_A31_PLL7_CFG_FACTOR_N     __BITS(14,8)
+#define AWIN_A31_PLL7_CFG_PREDIV_M     __BITS(3,0)
+
 #define AWIN_A31_AHB_GATING0_USB_OHCI2 __BIT(31)
 #define AWIN_A31_AHB_GATING0_USB_OHCI1 __BIT(30)
 #define AWIN_A31_AHB_GATING0_USB_OHCI0 __BIT(29)
@@ -1942,9 +1950,27 @@
 };
 #endif
 
+#define AWIN_A31_PIO_PA_PINS           28
+#define AWIN_A31_PIO_PA_GMAC_FUNC      2
+#define AWIN_A31_PIO_PA_GMAC_PINS      0x0e187e0f /* PA pins 27-25,20-19,14-9,3-0 */
+
+#define AWIN_A31_PIO_PB_PINS           8
 #define AWIN_A31_PIO_PB_TWI3_FUNC      2
 #define AWIN_A31_PIO_PB_TWI3_PINS      0x00000060 /* PB pins 6-5 */
 
+#define AWIN_A31_PIO_PC_PINS           28
+
+#define AWIN_A31_PIO_PD_PINS           28
+
+#define AWIN_A31_PIO_PE_PINS           17
+
+#define AWIN_A31_PIO_PF_PINS           6
+
+#define AWIN_A31_PIO_PG_PINS           19
+
+#define AWIN_A31_PIO_PH_PINS           31
+#define AWIN_A31_PIO_PH_UART0_FUNC     2
+#define AWIN_A31_PIO_PH_UART0_PINS     0x00300000 /* PH pins 21-20 */
 #define AWIN_A31_PIO_PH_TWI0_FUNC      2
 #define AWIN_A31_PIO_PH_TWI0_PINS      0x0000c000 /* PH pins 15-14 */
 #define AWIN_A31_PIO_PH_TWI1_FUNC      2